參數(shù)資料
型號: 951416AFLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產生/分配
英文描述: 220 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝: 0.300 INCH, 0.025 INCH PITCH, GREEN, MO-118, SSOP-56
文件頁數(shù): 27/27頁
文件大小: 248K
代理商: 951416AFLF
9
ICS951416
0937H—05/26/05
SMBus Table: Frequency Select Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
FS Source
Latched Input or SMBus
Frequency Select
RW
Latched
Inputs
SMBus
0
Bit 6
SS_EN
PLL Spread Enable
RW
OFF
ON
0
Bit 5
Reserved
RW
Reserved
0
Bit 4
FS4
Freq Select Bit 4
RW
0
Bit 3
FS3
Freq Select Bit 3
RW
0
Bit 2
FS2
Freq Select Bit 2
RW
Latched
Bit 1
FS1
Freq Select Bit 1
RW
Latched
Bit 0
FS0
Freq Select Bit 0
RW
Latched
Note: Byte 0 Bit 6, Byte 0 Bit 4 and Byte 5 Bit 4 must be set to '1' to fully enable spread.
SMBus Table: Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
PCICLK0
Output Enable
RW
Disable
Enable
1
Bit 6
HTTCLK0
Output Enable
RW
Disable
Enable
1
Bit 5
USB_48MHz
Output Enable
RW
Disable
Enable
1
Bit 4
REF0
Output Enable
RW
Disable
Enable
1
Bit 3
REF1
Output Enable
RW
Disable
Enable
1
Bit 2
REF2
Output Enable
RW
Disable
Enable
1
Bit 1
CPUCLK8(0)
Output Enable
RW
Disable
Enable
1
Bit 0
CPUCLK8(1)
Output Enable
RW
Disable
Enable
1
SMBus Table: CLKREQB# Output Control Register
Pin #
Name
Control Function
Type0
1
PWD
Bit 7
REQBSRC7
CLKREQB# Controls
SRC7
RW
Does not
control
Controls
0
Bit 6
REQBSRC6
CLKREQB# Controls
SRC6
RW
Does not
control
Controls
0
Bit 5
REQBSRC5
CLKREQB# Controls
SRC5
RW
Does not
control
Controls
0
Bit 4
REQBSRC4
CLKREQB# Controls
SRC4
RW
Does not
control
Controls
0
Bit 3
REQBSRC3
CLKREQB# Controls
SRC3
RW
Does not
control
Controls
0
Bit 2
Reserved
RW
Reserved
X
Bit 1
Reserved
RW
Reserved
X
Bit 0
REQBSRC0
CLKREQB# Controls
SRC0
RW
Does not
control
Controls
0
34,33
22,23
24,25
-
Byte 2
12,13
16,17
18,19
See Table 1: CPU
Frequency Selection
Byte 0
-
4
-
50
Byte 1
47
54
45,44
41,40
53
52
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