參數(shù)資料
型號(hào): 93C46A
廠商: Microchip Technology Inc.
元件分類: EEPROM
英文描述: 1K Microwire Compatible Serial EEPROM
中文描述: 一千微絲兼容串行EEPROM
文件頁(yè)數(shù): 6/24頁(yè)
文件大?。?/td> 403K
代理商: 93C46A
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
DS21749D-page 6
2003 Microchip Technology Inc.
2.4
ERASE
The
ERASE
instruction forces all data bits of the
specified address to the logical ‘1’ state. CS is brought
low following the loading of the last address bit. This
falling edge of the CS pin initiates the self-timed
programming cycle, except on ‘93C’ devices where the
rising edge of CLK before the last address bit initiates
the write cycle.
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (T
CSL
). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been erased and
the device is ready for another instruction.
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
FIGURE 2-1:
ERASE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-2:
ERASE TIMING FOR 93C DEVICES
CS
CLK
DI
DO
T
CSL
CHECK STATUS
1
1
1
A
N
A
N
-1
A
N
-2
A0
T
SV
T
CZ
BUSY
READY
HIGH-Z
T
WC
HIGH-Z
CS
CLK
DI
DO
T
CSL
CHECK STATUS
1
1
1
A
N
A
N
-1
A
N
-2
A0
T
SV
T
CZ
BUSY
READY
HIGH-Z
T
WC
HIGH-Z
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