參數(shù)資料
型號: 935269719112
廠商: NXP SEMICONDUCTORS
元件分類: 總線收發(fā)器
英文描述: ALVC/VCX/A SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
封裝: 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14
文件頁數(shù): 9/16頁
文件大?。?/td> 81K
代理商: 935269719112
2002 Nov 18
2
Philips Semiconductors
Product specication
Quad buffer/line driver; 3-state
74ALVC125
FEATURES
Wide supply voltage range from 1.65 to 3.6 V
Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V)
3.6 V tolerant inputs/outputs
CMOS low power consumption
Direct interface with TTL levels (2.7 to 3.6 V)
Power-down mode
Latch-up performance exceeds 250 mA
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
DESCRIPTION
The 74ALVC125 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit
tolerant for slower input rise and fall times.
The 74ALVC125 consists of four non-inverting buffer/line
drivers with 3-state outputs. The 3-state outputs (nY) are
controlled by the output enable input (nOE). A HIGH on
pin nOE causes the outputs to assume a high-impedance
OFF-state.
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C.
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
tPHL/tPLH
propagation delay inputs nA to output nY
VCC = 1.8 V; CL = 30 pF; RL =1k
2.4
ns
VCC = 2.5 V; CL = 30 pF; RL = 500
1.7
ns
VCC = 2.7 V; CL = 50 pF; RL = 500
2.0
ns
VCC = 3.3 V; CL = 50 pF; RL = 500
1.8
ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per buffer
VCC = 3.3 V; notes 1 and 2
outputs enable
27
pF
outputs disabled
5
pF
相關(guān)PDF資料
PDF描述
935269722118 ALVC/VCX/A SERIES, HEX 1-INPUT INVERT GATE, PDSO14
935269723118 ALVC/VCX/A SERIES, HEX 1-INPUT INVERT GATE, PDSO14
935269722112 ALVC/VCX/A SERIES, HEX 1-INPUT INVERT GATE, PDSO14
0804-5000-08 Embedded SIP - vertical mount
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