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參數(shù)資料
| 型號(hào)： | 935207460118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, 20 1-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 7.50 MM, PLASTIC, MO-118, SOT-371-1, SSOP3-56 |
| 文件頁(yè)數(shù)： | 8/11頁(yè) |
| 文件大?。?/td> | 121K |
| 代理商： | 935207460118 |
Philips Semiconductors
Product data
74ABT16841A
74ABTH16841A
20-bit bus interface latch (3-State)
2002 Dec 17
6
AC SET-UP REQUIREMENTS
GND = 0 V, tR = tF = 2.5 ns, CL = 50 pF, RL = 500
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = +25 °C
VCC = +5.0 V
Tamb = –40 °C to +85 °C
VCC = +5.0 V ±0.5 V
UNIT
Min
Typ
Min
Max
ts(H)
ts(L)
Set-up time, HIGH or LOW
nDx to nLE
3
2.0
1.0
0.4
2.0
1.0
ns
th(H)
th(L)
Hold time, HIGH or LOW
nDx to nLE
3
2.0
–0.3
–0.7
2.0
ns
tw(H)
nLE pulse width HIGH
1
2.9
1.9
2.9
ns
AC WAVEFORMS
VM = 1.5 V, VIN = GND to 3.0 V
tw(H)
tPHL
tPLH
nLE
nQx
SA00078
VM
3.0V or VCC
whichever
is less
0V
VOH
VOL
Waveform 1. Propagation Delay, Latch Enable Input to Output,
and Enable Pulse Width
nDx INPUT
VM
tPLH
tPHL
nQx OUTPUT
VM
SA00079
3.0V or VCC
whichever
is less
0V
3.0V or VCC
whichever
is less
0V
Waveform 2. Propagation Delay for Data to Outputs
NOTE: The shaded areas indicate when the input is
permitted to change for predictable output performance.
VM
nDx
VM
nLE
ts(H)
th(H)
ts(L)
th(L)
SA00080
VM
0V
3.0V or VCC
whichever
is less
3.0V or VCC
whichever
is less
Waveform 3. Data Set-up and Hold Times
VY
VM
nQx
tPZH
tPHZ
SH00007
nOE
0V
VOH
0V
3.0V or VCC
whichever
is less
Waveform 4. 3-State Output Enable Time to HIGH Level
and Output Disable Time from HIGH Level
VX
VM
nQx
tPZL
tPLZ
SH00008
nOE
VOL
0V
3.0V or VCC
whichever
is less
Waveform 5. 3-State Output Enable Time to LOW Level and
Output Disable Time from LOW Level
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