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參數(shù)資料
| 型號： | 935175150112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 178K |
| 代理商： | 935175150112 |
Philips Semiconductors - PIP - 74HC/HCT74; Dual D-type flip-flop with set and reset; positive-edge trigger
Product Information
74HC/HCT74; Dual
D-type flip-flop with
set and reset;
positive-edge
trigger
Information as of 2003-04-22
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Applications
Block diagram
topGeneral description
The 74HC/HCT74 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT74 are dual positive-edge triggered, D-type flip-flops with individual data (D) inputs, clock (CP)
inputs, set (SD ) and reset (RD) inputs; also complementary Q and Q outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information
on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D inputs
must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
topFeatures
q
Output capability: standard
q
ICC category: flip-flops
topDatasheet
Page
count
File
size
(kB)
Datasheet
74HC/HCT74 Dual D-type
flip-flop with
set and reset;
positive-edge
trigger
2/23/1998
Product specification 13
87
Additional datasheet info
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HC74N.html (1 of 5) [Apr-29-2003 10:30:45 AM]
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