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參數(shù)資料
| 型號： | 935047940623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ABT SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-137-1, SO-24 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 123K |
| 代理商： | 935047940623 |
Philips Semiconductors
Product data
74ABT648
Octal bus transceiver/register, inverting (3-State)
2002 Dec 13
4
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OE
DIR
CPAB
CPBA
SAB
SBA
An
Bn
X
↑
X
Input
Unspecified
output*
Store A, B unspecified
X
↑
X
Unspecified
output*
Input
Store B, A unspecified
H
X
↑
H or L
↑
H or L
X
Input
Store A and B data
Isolation, hold storage
L
X
H or L
X
L
H
Output
Input
Real time B data to A bus
Stored B data to A bus
L
H
X
H or L
X
L
H
X
Input
Output
Real time A data to B bus
Stored A data to B bus
H = HIGH voltage level
L
= LOW voltage level
X = Don’t care
↑ = LOW-to-HIGH clock transition
*
The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition of the clock.
LOGIC DIAGRAM
1D
C1
Q
19
18
17
16
15
14
13
B1
B2
B3
B4
B5
B6
B7
A1
A2
A3
A4
A5
A6
A7
DETAIL A X 7
OE
DIR
CPBA
SBA
CPAB
SAB
20
B0
1D
C1
Q
4
A0
1of 8 Channels
SA00081
5
6
7
8
9
10
11
2
1
22
23
3
21
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