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參數(shù)資料
| 型號： | 8P256SRA0202C15 |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | SRAM |
| 英文描述： | 128K X 16 MULTI DEVICE SRAM CARD, 150 ns, XMA68 |
| 封裝： | CADR1-68 |
| 文件頁數(shù)： | 7/11頁 |
| 文件大?。?/td> | 185K |
| 代理商： | 8P256SRA0202C15 |
5
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
SRA01-SRA04
February 2002
Rev. 6
CARD SIGNAL DESCRIPTION
Symbol
Type
Name and Function
A0 - A25
INPUT
ADDRESS INPUTS: A0 through A25 enable direct addressing of up to 64MB of memory on the card. Signal A0 is not
used in word access mode. A25 is the most signicant bit. (address pins used are based on card density,see pinout
for highest used address pin)
DQ0 - DQ15
INPUT/OUTPUT
DATA INPUT/OUTPUT: DQ0 THROUGH DQ15 constitute the bi-directional databus. DQ0 - DQ7 constitute the lower
(even) byte and DQ8 - DQ15 the upper (odd) byte. DQ15 is the MSB.
CE1#, CE2#
INPUT
CARD ENABLE 1 AND 2: CE1# enables even byte accesses, CE2# enables odd byte accesses. Multiplexing A0,
CE1# and CE2# allows 8-bit hosts to access all data on DQ0 - DQ7.
OE#
INPUT
OUTPUT ENABLE: Active low signal enabling read data from the memory card.
WE#
INPUT
WRITE ENABLE: Active low signal gating write data to the memory card.
RDY/BSY#
OUTPUT
READY/BUSY OUTPUT: Not used for SRAM cards
CD1#, CD2#
OUTPUT
CARD DETECT 1 and 2: Provide card insertion detection. These signals are connected to ground internally on the
memory card. The host socket interface circuitry shall supply 10K-ohm or larger pull-up resistors on these signal pins.
WP
OUTPUT
WRITE PROTECT: Follows hardware Write Protect Switch. When Switch is placed in on position, signal is pulled high
(10K ohm). When switch is off signal is pulled low.
VPP1, VPP2
N.C.
PROGRAM/ERASE POWER SUPPLY: Not used for SRAM cards.
VCC
CARD POWER SUPPLY: 5.0V for all internal circuitry.
GND
GROUND: for all internal circuitry.
REG#
INPUT
ATTRIBUTE MEMORY SELECT: only used with cards built with optional attribute memory.
RST
INPUT
RESET: Not used for SRAM cards
WAIT#
OUTPUT
WAIT: This signal is pulled high internally for compatibility. No wait states are generated.
BVD1, BVD2
OUTPUT
BATTERY VOLTAGE DETECT: Provides status of Battery voltage.
BVD2 = BVD1 = VOH (battery voltage is guaranteed to retain data)
BVD2 = VOL, BVD1 = Voh (data is valid, battery recharge required)
BVD2 = BVD1 = VOL (data may no longer be valid, battery requires extended recharge)
VS1, VS2
OUTPUT
VOLTAGE SENSE: Noties the host socket of the card’s VCC requirements. VS1 and VS2 are open to indicate a 5V,
16 bit card has been inserted.
RFU
RESERVED FOR FUTURE USE
N.C.
NO INTERNAL CONNECTION TO CARD: pin may be driven or left oating
FUNCTIONAL TRUTH TABLE
READ function
Common Memory
Attribute Memory
Function Mode
CE2# CE1# A0
OE# WE#
REG#
D15-D8
D7-D0
REG#
D15-D8
D7-D0
Standby Mode
H
X
High-Z
X
High-Z
Byte Access (8 bits)
H
L
H
High-Z
Even-Byte
L
High-Z
Even-Byte
H
L
H
L
H
High-Z
Odd-Byte
L
High-Z
Not Valid
Word Access (16 bits)
L
X
L
H
Odd-Byte
Even-Byte
L
Not Valid
Even-Byte
Odd-Byte Only Access
L
H
X
L
H
Odd-Byte
High-Z
L
Not Valid
High-Z
WRITE function
Standby Mode
H
X
Byte Access (8 bits)
H
L
H
L
H
X
Even-Byte
L
X
Even-Byte
H
L
H
L
H
X
Odd-Byte
L
X
Word Access (16 bits)
L
X
H
L
H
Odd-Byte
Even-Byte
L
X
Even-Byte
Odd-Byte Only Access
L
H
X
H
L
H
Odd-Byte
X
L
X
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