參數(shù)資料
型號(hào): 79RC32V364100DA
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 微控制器/微處理器
英文描述: RISController Embedded 32-bit Microprocessor, based on RISCore32300
中文描述: 32-BIT, 100 MHz, RISC PROCESSOR, PQFP144
封裝: 20 X 20 MM, 1.40 MM HEIGHT, TQFP-144
文件頁數(shù): 17/21頁
文件大小: 370K
代理商: 79RC32V364100DA
17 of 21
June 20, 2000
79RC32364
Standard JTAG Timing
Figure 8 represents the timing diagram for the EJTAG interface signals.
*Notice: The information in this document is subject to change without notice
The standard JTAG connector is a 10-pin connector providing 5 signal and 5 ground pins. For Enhanced JTAG, a 24-pin connector has been
chosen providing 12 signal pins and 12 ground pins. This guarantees the elimination of noise problems by incorporating a signal-ground type arrange-
ment.
Figure 8 Standard JTAG timing
TDI/DINT*
TMS
TDO/TPC,
TPC[8:2]
TDO
TDO
TPC
PCST[2:0],
TRST*
TCK
DCLK
PCST
t3
t14
t14
t1
t2
t15
t15
t9
t10
t5
t6
t4
t8
t7
t13
t12
t11
TPC,PCST[2:0] capture
Notes to diagram:
t1 = t
TCKlow
t2 = t
TCKHIGH
t3 = t
TCK
t4 = t
TDODO
t5 = t
TDIS
t6 = t
TDIH
t7 = t
PCSTDO
t8 = t
TPCDO
t9 = t
DCKHIGH
t10 = t
DCKLOW
t11 = t
DCK
t12 = t
TRSTDO
t13 = t
TRSTR
t14 = t
TCK RISE, tTCK FALL
t15 = t
DCK RISE,
t
DCK FALL
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