- 您現(xiàn)在的位置：買賣IC網 > PDF目錄1888 > 78P2351R-IMR/F (Maxim Integrated Products)IC LIU NRZ-CMI CONV 155M 56-QFN PDF資料下載
參數(shù)資料
| 型號： | 78P2351R-IMR/F |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 27/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU NRZ-CMI CONV 155M 56-QFN |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | 線路接口裝置（LIU） |
| 驅動器/接收器數(shù)： | 1/1 |
| 規(guī)程： | E4，OC-3，STM1-E |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 56-QFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當前第27頁第28頁第29頁第30頁第31頁
78P2351R
Serial 155M
NRZ to CMI Converter
Page: 5 of 31
2006 Teridian Semiconductor Corporation
Rev. 2.1
TRANSMITTER OPERATION
The transmitter section generates an adjustable
ITU-T
G.703
compliant
analog
signal
for
transmission through a wideband transformer onto
75
coaxial cable. Differential NRZ data is input to
the 78P2351R on the SIDP/N pins at LVPECL levels
and passed to a low jitter clock and data recovery
circuit.
An optional clock decoupling FIFO is
provided to decouple the on chip and off chip clocks.
The NRZ data is encoded using CMI line coding to
ensure an adequate number of transitions.
Each of the transmit timing modes can be configured
in HW mode or SW mode as shown in the table
below.
HW Control
SW Control
Tx Mode
CKMODE
SMOD[1:0]
Reserved
Low
0 0
Synchronous
(FIFO enabled)
Floating
1 0
Plesiochronous
High
0 1
Loop-timing
n/a
1 1
Plesiochronous Mode
Plesiochronous
mode
represents
a
common
condition where a synchronous reference clock is
not available.
In this mode, the 78P2351R will
recover the transmit clock from the plesiochronous
data and bypass the internal FIFO and re-timing
block. This mode is commonly used for mezzanine
cards, modules, and any application where the
reference clock can’t always be synchronous to the
transmit source clock/data
TDK
78P2351R
Framer/
Mapper
NRZ
System
Clock
SODP/N
SIDP/N
CKREFP
RXP/N
CMIP/N
XFMR
CMI
Coax
XO
Figure 1: Plesiochronous Mode
Synchronous Mode
When the NRZ transmit data is source synchronous
with the reference clock applied at CKREFP/N as
shown in Figure 2, the 78P2351R can be optionally
used in synchronous mode or re-timing mode. In
this mode, the 78P2351R will recover the clock from
the NRZ data input and re-time the data in an
integrated +/- 4-bit FIFO.
TDK
78P2351R
Framer/
Mapper
NRZ
System Reference Clock
SODP/N
SIDP/N
CKREFP/N
RXP/N
CMIP/N
XFMR
CMI
Coax
Figure 2: Synchronous
Since the reference clock and transmit clock/data go
through different delay paths, it is inevitable that the
phase relationship between the two clocks can vary
in a bounded manner due to the fact that the
absolute delays in the two paths can vary over time.
The transmit FIFO allows long-term clock phase drift
between the Tx clock and system reference clock,
not exceeding +/- 25.6ns, to be handled without
transmit error.
If the clock wander exceeds the
specified limits, the FIFO will over or under flow, and
the FERR register signal will be asserted.
This
signal can be used to trigger an interrupt.
This
interrupt event is automatically cleared when a FIFO
Reset (FRST) pulse is applied, and the FIFO is re-
centered.
Notes:
1) External remote loopbacks (i.e. loopback
within
framer)
are
not
possible
in
synchronous
operation
(FIFO
enabled)
unless the data is re-justified to be
synchronous to the system reference clock
or the 78P2351R is configured for loop-
timing operation.
2) During IC power-up or transmit power-up,
the clocks going to the FIFO may not be
stable and cause the FIFO to overflow or
underflow. As such, the FIFO should be
manually reset using FRST anytime the
transmitter is powered-up.
Clock Synthesizer
The transmit clock synthesizer is a low-jitter PLL that
generates a 311.04 MHz clock for the CMI encoder.
A synthesized 155.52 MHz reference clock is also
used in both the receive and transmit sides for clock
and data recovery.
相關PDF資料 |
PDF描述 |
|---|---|
| 78P2352-IELR/F | IC LIU SDH SONET 2CH 128-LQFP |
| 78Q2120C09-64CGTR/F | TXRX 10/100 BASE 3.3V 64-LQFP |
| 78Q2133/F | TXRX 10/100 MDIX 3.3V IND 32-QFN |
| 78Q8392LA03-28CHR/F | TXRX 10BASE 2/5 ETH COAX 28-PLCC |
| 78Q8430-100IGT/F | IC LAN MEDIA ACCESS CTLR 100LQFP |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 78P2352 | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-DB/CMI | 功能描述:BOARD DEMO 78P2352 COAX CABLE RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:* 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
| 78P2352-DB-CMI | 功能描述:界面開發(fā)工具 78P2352 Demo Brd For Coax Cable RoHS:否 制造商:Bourns 產品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| 78P2352-IEL | 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Dual Channel OC-3/ STM1-E/ E4 LIU |
| 78P2352-IEL/F | 功能描述:接口 - 專用 Dual Ch OC-3/STM1-1e/E4 LIU RoHS:否 制造商:Texas Instruments 產品類型:1080p60 Image Sensor Receiver 工作電源電壓:1.8 V 電源電流:89 mA 最大功率耗散: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:BGA-59 |
發(fā)布緊急采購，3分鐘左右您將得到回復。