
7534 Group
Rev.2.00 Jun 21, 2004 page 11 of 54
REJ03B0099-0200Z
Fig. 11 Memory map of special function register (SFR)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
6
0
1
1
6
0
2
1
6
0
3
1
6
0
4
1
6
0
5
1
6
0
6
1
6
0
7
1
6
0
8
1
6
0
9
1
6
0
A
1
6
0
B
1
6
0
C
1
6
0
D
1
6
0
E
1
6
0
F
1
6
0010
16
0011
16
0
1
0
1
0
1
0
1
2
1
6
3
1
6
4
1
6
5
1
6
0016
16
0017
16
0018
16
0
1
0
1
0
1
0
1
9
1
6
A
1
6
B
1
6
C
1
6
001D
16
001E
16
0
1
F
1
6
P
o
o
o
o
o
o
o
o
o
o
r
t
P
0
(
P
0
)
P
r
t
P
0
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
0
D
)
P
r
t
P
1
(
P
1
)
P
r
t
P
1
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
1
D
)
P
r
t
P
2
(
P
2
)
P
r
t
P
2
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
2
D
)
P
r
t
P
3
(
P
3
)
P
r
t
P
3
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
3
D
)
Pull-up control register (PULL)
Transmit/Receive buffer register (TB/RB)
S
B
s
t
a
t
u
s
r
e
g
i
s
t
e
r
(
U
e
r
i
a
l
I
/
O
1
c
o
n
t
r
o
l
r
e
A
R
T
c
o
n
t
r
o
l
r
e
g
i
s
t
e
a
u
d
r
a
t
e
g
e
n
e
r
a
t
o
r
U
S
B
S
T
S
)
/
U
A
R
T
s
t
a
t
u
s
r
e
g
i
s
t
e
r
(
U
A
R
T
S
T
S
)
S
g
i
s
t
e
r
(
S
I
O
1
C
O
N
)
U
r
(
U
A
R
T
C
O
N
)
B
(
B
R
G
)
Port P1P3 control register (P1P3C)
USB data toggle synchronization register ( TRSYNC)
USB interrupt source discrimination register 1 (USBIR1)
S
B
i
n
t
e
r
r
u
p
t
s
o
u
r
c
e
d
i
s
c
r
i
m
U
i
n
a
t
i
o
n
r
e
g
i
s
t
e
r
2
(
U
S
B
I
R
2
)
0020
16
0021
16
0022
16
0023
16
0024
16
0025
16
0026
16
0027
16
0028
16
0029
16
002A
16
002B
16
002C
16
002D
16
002E
16
002F
16
0030
16
0031
16
0032
16
0033
16
0034
16
0035
16
0036
16
0037
16
0038
16
0039
16
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
T
i
m
e
r
c
o
u
n
t
s
o
u
r
c
e
s
e
t
r
e
g
i
s
t
e
r
(
T
C
S
S
)
A
/
D
c
o
n
v
e
r
s
i
o
n
r
e
g
i
s
t
e
r
(
l
o
w
-
o
r
d
e
r
)
(
A
D
L
)
P
i
i
i
r
i
r
e
s
c
a
l
e
r
1
2
(
P
R
E
1
2
)
T
m
e
r
1
(
T
1
)
T
m
e
r
2
(
T
2
)
T
m
e
r
X
m
o
d
e
r
e
g
i
s
t
e
r
(
T
M
)
P
e
s
c
a
l
e
r
X
(
P
R
E
X
)
T
m
e
r
X
(
T
X
)
Serial I/O2 control register (SIO2CON)
Serial I/O2 register (SIO2)
A
/
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
A
D
C
O
N
)
A/D conversion register (high-order) (ADH)
MISRG
a
t
In
t
e
P
U
In
t
e
W
c
h
d
o
g
t
i
m
e
r
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
W
D
T
C
O
N
)
r
r
u
p
t
e
d
g
e
s
e
l
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
I
N
T
E
D
G
E
)
C
m
o
d
e
r
e
g
i
s
t
e
r
(
C
P
U
M
)
r
r
u
p
t
r
e
q
u
e
s
t
r
e
g
i
s
t
e
r
1
(
I
R
E
Q
1
)
Interrupt control register 1 (ICON1)
U
S
S
S
S
S
S
S
S
B
i
n
t
e
r
r
u
p
t
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
U
S
B
I
C
O
N
)
U
B
t
r
a
n
s
m
i
t
d
a
t
a
b
y
t
e
n
u
m
b
e
r
s
e
t
r
e
g
i
s
t
e
r
0
(
E
P
0
B
Y
T
E
)
U
B
t
r
a
n
s
m
i
t
d
a
t
a
b
y
t
e
n
u
m
b
e
r
s
e
t
r
e
g
i
s
t
e
r
1
(
E
P
1
B
Y
T
E
)
U
B
P
I
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
0
(
E
P
0
P
I
D
)
U
B
P
I
D
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
1
(
E
P
1
P
I
D
)
U
B
a
d
d
r
e
s
s
r
e
g
i
s
t
e
r
(
U
S
B
A
)
U
B
s
e
q
u
e
n
c
e
b
i
t
i
n
i
t
i
a
l
i
z
a
t
i
o
n
r
e
g
i
s
t
e
r
(
I
N
I
S
Q
1
)
U
B
c
o
n
t
r
o
l
r
e
g
i
s
t
e
r
(
U
S
B
C
O
N
)
P
r
t
P
4
(
P
4
)
P
r
t
P
4
d
i
r
e
c
t
i
o
n
r
e
g
i
s
t
e
r
(
P
4
D
)