參數(shù)資料
型號: 74VHC4046NX
廠商: National Semiconductor Corporation
英文描述: CMOS Phase Lock Loop
中文描述: 的CMOS鎖相環(huán)
文件頁數(shù): 8/14頁
文件大?。?/td> 283K
代理商: 74VHC4046NX
Comparator I
Comparator II & III
R
2
e
%
R
2
i
%
R
2
e
%
R
2
i
%
–Given: f
0
–Use f
0
with curve titled
center frequency vs R1, C
to determine R1 and C1
–Given: f
0
and f
L
–Calculate f
min
from the
equation f
min
e
f
o
b
f
L
–Use f
min
with curve titled
offset frequency vs R2, C
to determine R2 and C1
–Calculate f
max
/f
min
from
the equation f
max
/f
min
e
f
o
a
f
L
/f
o
b
f
L
–Use f
max
/f
min
with curve
titled f
max
/f
min
vs R2/R1
to determine ratio R2/R1
to obtain R1
–Given: f
max
–Calculate f
0
from the
equation f
o
e
f
max
/2
–Use f
0
with curve titled
center frequency vs R1, C
to determine R1 and C1
–Given: f
min
and f
max
–Use f
min
with curve titled
offset frequency vs R2,
C to determine R2 and C1
–Calculate f
max
/f
min
–Use f
max
/f
min
with curve
titled f
max
/f
min
vs R2/R1
to determine ratio R2/R1
to obtain R1
(b)
FIGURE 1
(Continued)
Detailed Circuit Description
VOLTAGE CONTROLLED OSCILLATOR/SOURCE
FOLLOWER
The VCO requires two or three external components to op-
erate. These are R1, R2, C1. Resistor R1 and capacitor C1
are selected to determine the center frequency of the VCO.
R1 controls the lock range. As R1’s resistance decreases
the range of f
min
to f
max
increases. Thus the VCO’s gain
decreases. As C1 is changed the offset (if used) of R2, and
the center frequency is changed. (See typical performance
curves) R2 can be used to set the offset frequency with 0V
at VCO input. If R2 is omitted the VCO range is from 0Hz. As
R2 is decreased the offset frequency is increased. The ef-
fect of R2 is shown in the design information table and typi-
cal performance curves. By increasing the value of R2 the
lock range of the PLL is offset above 0Hz and the gain
(Volts/rad.) does not change. In general, when offset is de-
sired, R2 and C1 should be chosen first, and then R1 should
be chosen to obtain the proper center frequency.
Internally the resistors set a current in a current mirror as
shown in Figure 1. The mirrored current drives one side of
TL/F/11675–18
FIGURE 2. Logic Diagram for VCO
8
相關(guān)PDF資料
PDF描述
74VHC4046MTC CMOS Phase Lock Loop
74VHC4046 CMOS Phase Lock Loop
74VHC4046M CMOS Phase Lock Loop
74VHC4046N 3-Line To 8-Line Decoders/Demultiplexers 16-TSSOP -40 to 85
74VHC4046MTCX Code Hopping Encoder 3.5- 13V, -40C to +85C, 8-SOIC 150mil, T/R
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74VHC4051 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:8-Channel Analog Multiplexer . Dual 4-Channel Analog Multiplexer . Triple 2-Channel Analog Multiplexer
74VHC4051AFT 功能描述:1 Circuit IC Switch 8:1 37 Ohm 16-TSSOPB 制造商:toshiba semiconductor and storage 系列:- 包裝:剪切帶(CT) 零件狀態(tài):有效 開關(guān)電路:- 多路復用器/解復用器電路:8:1 電路數(shù):1 導通電阻(最大值):37 歐姆 通道至通道匹配(ΔRon):5 歐姆 電壓 -?電源,單(V+):2 V ~ 5.5 V 電壓 - 電源,雙(V±):- 開關(guān)時間(Ton, Tof)(最大值):12ns,12ns -3db 帶寬:180MHz 電荷注入:- 溝道電容 (CS(off),CD(off)):0.5pF,23.4pF 電流 - 漏泄(IS(off))(最大值):100nA 串擾:-45dB @ 1MHz 工作溫度:-40°C ~ 85°C(TA) 封裝/外殼:16-TSSOP(0.173",4.40mm 寬) 供應商器件封裝:16-TSSOPB 標準包裝:1
74VHC4051M 功能描述:多路器開關(guān) IC 8-Chan Ana Multiplex RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時間(最大值): 關(guān)閉時間(最大值): 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16
74VHC4051M_Q 功能描述:多路器開關(guān) IC 8-Chan Ana Multiplex RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時間(最大值): 關(guān)閉時間(最大值): 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16
74VHC4051MTC 功能描述:多路器開關(guān) IC 8-Chan Ana Multiplex RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時間(最大值): 關(guān)閉時間(最大值): 傳播延遲時間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UQFN-16