參數(shù)資料
型號: 74VHC03TTR
廠商: STMICROELECTRONICS
元件分類: 門電路
英文描述: AHC/VHC SERIES, QUAD 2-INPUT NAND GATE, PDSO14
封裝: TSSOP-14
文件頁數(shù): 6/11頁
文件大小: 245K
代理商: 74VHC03TTR
74VHC03
4/11
Table 8: Capacitive Characteristics
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
Table 9: Dynamic Switching Characteristics
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
Figure 3: Test Circuit
CL = 15/50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 1K or equivalent
RT = ZOUT of pulse generator (typically 50)
Symbol
Parameter
Test Condition
Value
Unit
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
410
10
pF
COUT
Output
Capacitance
5pF
CPD
Power Dissipation
Capacitance
(note 1)
6pF
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
VOLP
Dynamic Low
Voltage Quiet
Output (note 1, 2)
5.0
CL = 50 pF
0.3
0.8
V
VOLV
-0.8
-0.3
VIHD
Dynamic High
Voltage Input
(note 1, 3)
5.0
3.5
V
VILD
Dynamic Low
Voltage Input
(note 1, 3)
5.0
1.5
V
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