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參數(shù)資料
| 型號(hào)： | 74V2T32STR |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | DUAL 2-INPUT OR GATE |
| 中文描述： | 雙2輸入或門 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 80K |
| 代理商： | 74V2T32STR |
1/7
March 2004
I
HIGH SPEED: t
PD
= 4.6ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 1
μ
A(MAX.) at T
A
= 25°C
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
IMPROVED LATCH-UP IMMUNITY
I
I
I
I
I
I
DESCRIPTION
The 74V2T32 is an advanced high-speed CMOS
DUAL
2-INPUT
OR
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
GATE
fabricated
with
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage.
This device can be used to interface 5V to 3V
systems and it is ideal for portable applications
like
personal
digital
battery-powered equipment.
All
inputs
and
outputs
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
assistant
and
all
are
equipped
with
74V2T32
DUAL 2-INPUT OR GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
T & R
SOT23-8L
74V2T32STR
SOT23-8L
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