參數(shù)資料
型號(hào): 74LVTH16373
廠商: Fairchild Semiconductor Corporation
英文描述: Octal Bus Transceivers With 3-State Outputs 20-TSSOP -40 to 85
中文描述: 低電壓16位透明鎖存器與三態(tài)輸出
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 98K
代理商: 74LVTH16373
3
www.fairchildsemi.com
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Functional Description
The LVT16373 and LVTH16373 contain sixteen D-type
latches with 3-STATE standard outputs. The device is byte
controlled with each byte functioning identically, but inde-
pendent of the other. Control pins can be shorted together
to obtain full 16-bit operation. The following description
applies to each byte. When the Latch Enable (LE
n
) input is
HIGH, data on the D
n
enters the latches. In this condition
the latches are transparent, i.e, a latch output will change
states each time its D input changes. When LE
n
is LOW,
the latches store information that was present on the D
inputs a setup time preceding the HIGH-to-LOW transition
of LE
n
. The 3-STATE standard outputs are controlled by
the Output Enable (OE
n
) input. When OE
n
is LOW, the
standard outputs are in the 2-state mode. When OE
n
is
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the latches.
Logic Diagrams
Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.
相關(guān)PDF資料
PDF描述
74LVTH16373MEA Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs
74LVTH16373MTD Octal Bus Transceivers With 3-State Outputs 20-SOIC -40 to 85
74LVTH16373MTDX Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs
74LVTH16373GX Low Voltage 16-Bit Transparent Latch with 3-STATE Outputs
74LVTH16500 Low Voltage 18-Bit Universal Bus Transceivers with 3-STATE Outputs Preliminary
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