參數(shù)資料
型號: 74LVQ374SJ
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
中文描述: LVQ SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封裝: 5.30 MM, EIAJ TYPE2, SOP-20
文件頁數(shù): 2/6頁
文件大?。?/td> 103K
代理商: 74LVQ374SJ
Pin Descriptions
Pin Names
D
0
–D
7
CP
OE
O
0
–O
7
Description
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Truth Table
Inputs
CP
Outputs
O
n
H
L
Z
D
n
H
L
X
OE
L
L
H
N
N
X
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
N
= LOW-to-HIGH Transition
Functional Description
The LVQ374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The buff-
ered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D-type inputs that meet the setup and hold time re-
Logic Diagram
quirements on the LOW-to-HIGH Clock (CP) transition. With
the Output Enable (OE) LOW, the contents of the eight
flip-flops are available at the outputs. When the OE is HIGH,
the outputs go to the high impedance state. Operation of the
OE input does not affect the state of the flip-flops.
DS011360-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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