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參數(shù)資料
| 型號： | 74LVC2373ADB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal D-type transparent latch with 5-volt tolerant inputs/outputs; damping resistor 3-State |
| 中文描述： | LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 5.30 MM, PLASTIC, SOT-339-1, SSOP-20 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 117K |
| 代理商： | 74LVC2373ADB |
Philips Semiconductors
Product specification
74LVC2373A
74LVCH2373A
Octal D-type transparent latch with 5-volt tolerant
inputs/outputs; damping resistor (3-State)
1997 Mar 12
6
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
2.5 ns; C
L
= 50 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V
±
0.3V
MIN
TYP
1
V
CC
= 2.7V
MIN
V
CC
= 1.2V
TYP
UNIT
MAX
MAX
t
PHL
/t
PLH
Propagation delay
Dn to Qn
Propagation delay
LE to Qn
3-State output enable time
OE to Qn
3-State output disble time
OE to Qn
LE pulse width HIGH
Figures 1, 5
1.5
–
8.5
1.5
9.5
–
ns
t
PHL/
t
PLH
Figures 2, 5
1.5
–
9.5
1.5
11
–
ns
t
PZH
/t
PZL
Figures 3, 5
1.5
–
9.0
1.5
11
–
ns
t
PHZ
/t
PLZ
Figures 3, 5
1.5
–
6.0
1.5
6.5
–
ns
t
W
Figure 2
4.0
–
–
4.0
–
–
ns
t
su
Set-up time
Dn to LE
Hold time
Dn to LE
Figure 4
2.0
–
–
3.0
–
–
ns
t
h
Figure 4
2.0
–
–
3.0
–
–
ns
NOTE:
1. These typical values are at V
CC
= 3.3V and T
amb
= 25
°
C.
AC WAVEFORMS
V
M
= 1.5 V at V
CC
V
M
= 0.5 V
CC
at V
CC
< 2.7 V
V
OL
and V
OH
are the typical output voltage drop that occur with the output load.
V
X
= V
OL
+ 0.3 V at V
CC
≥
2.7 V
V
X
– V
OL
+ 0.1
V
CC
at V
CC
< 2.7 V
V
Y
= V
OH
– 0.3 V at V
CC
≥
2.7 V
V
Y
= V
OH
– 0.1
V
CC
at V
CC
< 2.7 V
2.7 V
SV00690
V
M
INPUTS
GND
V
OH
V
OL
V
I
OUTPUTS
V
M
t
PLH
t
PHL
Figure 1. nput (Dn) to output (Qn) propagation delays
SV00691
V
M
LE INPUT
V
OL
GND
V
OH
V
I
Q
n
OUTPUT
V
M
t
PLH
t
PHL
t
W
Figure 2. Latch enable input (LE) pulse width, the latch enable
input to output (Qn) propagation delays
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