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參數(shù)資料
| 型號： | 74LV163DB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable synchronous 4-bit binary counter; synchronous reset |
| 中文描述： | LV/LV-A/LVX/H SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16 |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 142K |
| 代理商： | 74LV163DB |
Philips Semiconductors
Product specification
74LV163
Presettable synchronous 4-bit binary counter;
synchronous reset
1998 Apr 30
8
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
≤
2.5ns; C
L
= 50pF; R
L
=
1
K
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
–40 to +85
°
C
TYP
1
95
32
24
18
2
115
–40 to +125
°
C
MIN
UNIT
V
CC
(V)
1.2
2.0
2.7
3.0 to 3.6
1.2
MIN
MAX
MAX
t
PHL/
t
PLH
Propagation delay
CP to Q
n
Figures 1
61
45
36
75
55
44
ns
y
t
PHL/
PLH
t
Propagation delay
CP to TC
Figures 1
2.0
39
75
90
ns
y
2.7
29
22
2
55
66
3.0 to 3.6
44
53
1.2
55
t
PHL/
PLH
t
Propagation delay
CET to TC
Figures 2
2.0
19
36
44
ns
y
2.7
14
10
2
26
33
3.0 to 3.6
21
26
Clock
HIGH or LOW
l
idth
2.0
34
10
41
t
w
Figures 1
2.7
25
8
6
2
25
9
6
5
2
30
10
8
6
2
30
10
8
6
2
–35
–12
–9
–7
40
58
70
30
ns
3.0 to 3.6
1.2
2.0
2.7
3.0 to 3.6
1.2
2.0
2.7
3.0 to 3.6
1.2
2.0
2.7
3.0 to 3.6
1.2
2.0
2.7
3.0 to 3.6
2.0
2.7
3.0 to 3.6
20
24
t
su
Set-up time
MR, D
n
to CP
Figures 3 4
Figures 3, 4
22
16
13
26
19
15
ns
t
su
Set-up time
PE to CP
Figures 3
22
16
13
26
19
15
ns
t
su
Set-up time
CEP, CET to CP
Figures 5
22
16
13
26
19
15
ns
h
t
Hold time
PE CEP CET
D
, PE, CEP, CET,
MR to CP
Figures 3 4 5
Figures 3, 4, 5
0
0
0
14
19
24
0
0
0
12
16
20
ns
Maxi
pulse frequency
l
k
f
max
Figures 1
MHz
NOTES:
1. Unless otherwise stated, all typical values are measured at T
amb
= 25
°
C
2. Typical values are measured at V
CC
= 3.3 V.
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| 74LV163DB-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Synchronous Up Counter |
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| 74LV163PW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Presettable synchronous 4-bit binary counter; synchronous reset |
| 74LV163PWDH | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Presettable synchronous 4-bit binary counter; synchronous reset |
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