參數(shù)資料
型號： 74LCX573MTR
廠商： 意法半導(dǎo)體
英文描述： OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
中文描述： 八路D型鎖存器非反相容限為5V輸入和輸出（三態(tài)）
文件頁數(shù)： 5/10頁
文件大小： 206K
代理商： 74LCX573MTR
74LCX573
5/10
AC ELECTRICAL CHARACTERISTICS
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
1) C
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per latch)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
R
L
(
)
t
s
=
t
r
(ns)
-40 to 85 °C
-55 to 125 °C
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time (Dn to Qn)
2.7
50
500
2.5
1.5
1.5
1.5
1.5
1.5
9.0
8.0
9.5
8.5
9.5
1.5
1.5
1.5
1.5
1.5
9.0
8.0
9.5
8.5
9.5
ns
3.0 to 3.6
2.7
3.0 to 3.6
2.7
t
PLH
t
PHL
Propagation Delay
Time (LE to Qn)
50
500
2.5
ns
t
PZL
t
PZH
Output Enable Time
to HIGH and LOW
level
Output Disable Time
from HIGH to LOW
level
Set-Up Time, HIGH
or LOW level
(Dn to LE)
Hold Time, HIGH or
LOW level
(Dn to LE)
LE Pulse Width,
HIGH
50
500
2.5
ns
3.0 to 3.6
1.5
8.5
1.5
8.5
t
PLZ
t
PHZ
2.7
50
500
2.5
1.5
8.5
1.5
8.5
ns
3.0 to 3.6
1.5
7.5
1.5
7.5
t
S
2.7
50
500
2.5
2.5
2.5
ns
3.0 to 3.6
2.5
2.5
t
h
2.7
50
500
2.5
1.5
1.5
ns
3.0 to 3.6
1.5
1.5
t
W
2.7
50
500
2.5
3.3
3.3
3.3
3.3
ns
3.0 to 3.6
3.0 to 3.6
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
50
500
2.5
1.0
1.0
ns
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25 °C
Min.
Typ.
Max.
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation Capacitance
(note 1)
3.3
3.3
3.3
V
IN
= 0 to V
CC
V
IN
= 0 to V
CC
f
IN
= 10MHz
V
IN
= 0 or V
CC
6
12
25
pF
pF
pF
相關(guān)PDF資料
PDF描述
74LCX573 Octal D-Type Latch Non Inverting with 5V Tolerant Inputs and Outputs(八D鎖存器)
74LCX574 Octal Buffers And Line Drivers With 3-State Outputs 20-SSOP -40 to 85
74LCX574MTR OCTAL D-TYPE FLIP FLOP NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS
74LCX574TTR Octal Buffers And Line Drivers With 3-State Outputs 20-SOIC -40 to 85
74LCX574MSA Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74LCX573SJ 功能描述:閉鎖 Octal Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LCX573SJ_08 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
74LCX573SJ_Q 功能描述:閉鎖 Octal Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LCX573SJX 功能描述:閉鎖 Octal Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel
74LCX573T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit D-Type Latch
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