參數(shù)資料
型號(hào): 74LCX573BQX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類(lèi): 通用總線功能
英文描述: Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
中文描述: LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, QCC20
封裝: 2.50 X 4.50 MM, LEAD FREE, MO-241AC, DQFN-20
文件頁(yè)數(shù): 1/12頁(yè)
文件大小: 553K
代理商: 74LCX573BQX
2005 Fairchild Semiconductor Corporation
DS012405
www.fairchildsemi.com
March 1995
Revised March 2005
7
74LCX573
Low Voltage Octal Latch with 5V Tolerant
Inputs and Outputs
General Description
The LCX573 is a high-speed octal latch with buffered com-
mon Latch Enable (LE) and buffered common Output
Enable (OE) inputs.
The LCX573 is functionally identical to the LCX373 but has
inputs and outputs on opposite sides.
The LCX573 is designed for low voltage (3.3V or 2.5V)
applications with capability of interfacing to a 5V signal
environment. The LCX573 is fabricated with an advanced
CMOS technology to achieve high speed operation while
maintaining CMOS low power dissipation.
Features
I
5V tolerant inputs and outputs
I
2.3V–3.6V V
CC
specifications provided
I
7.0 ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
I
Power down high impedance inputs and outputs
I
Supports live insertion/withdrawal (Note 1)
I
r
24 mA output drive (V
CC
3.0V)
I
Implements patented noise/EMI reduction circuitry
I
Latch-up performance exceeds JEDEC 78 conditions
I
ESD performance:
Human body model
!
2000V
Machine model
!
200V
I
Leadless Pb-Free DQFN package
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
X
to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 2:
DQFN package available in Tape and Reel only.
Note 3:
_NL
indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Order Number
Package
Number
M20B
M20D
MLP020B
Package Description
74LCX573WM
74LCX573SJ
74LCX573BQX
(Preliminary)
(Note 2)
74LCX573MSA
74LCX573MTC
74LCX573MTCX_NL
(Note 3)
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Pb-Free 20-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 4.5mm
MSA20
MTC20
MTC20
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
相關(guān)PDF資料
PDF描述
74LCX573MSA Octal Buffers And Line Drivers With 3-State Outputs 20-TSSOP -40 to 85
74LCX573MTC Octal Buffers And Line Drivers With 3-State Outputs 20-TSSOP -40 to 85
74LCX573MTCX_NL Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
74LCX573SJ Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
74LCX573WM Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs
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參數(shù)描述
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