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參數(shù)資料
| 型號(hào)： | 74LCX573 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Octal D-Type Latch Non Inverting with 5V Tolerant Inputs and Outputs(八D鎖存器) |
| 中文描述： | 八路D型鎖存器非反相與5V容限輸入和輸出（八?鎖存器） |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 74LCX573 |
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Conditions
Value
T
A
= 25
o
C
Min.
Typ.
Unit
V
CC
(V)
Max.
C
IN
C
i/o
C
PD
Input Capacitance
I/O Capacitance
Power Dissipation Capacitance (note 1)
3.3
3.3
3.3
V
IN
= 0 to V
CC
V
IN
= 0 to V
CC
f
IN
= 10MHz
V
IN
= 0 or V
CC
6
pF
pF
pF
12
25
1) C
PD
isdefined as the value ofthe IC’s internalequivalent capacitance which iscalculated fromtheoperating currentconsumption without load. Average
operting current can beobtained bythe followingequation. I
CC
(opr) = C
PD
V
CC
f
IN
+I
CC
/n(per circuit)
AC ELECTRICAL CHARACTERISTICS
(C
L
= 50 pF, R
L
= 500
, Input t
r
= t
f
= 2.5 ns)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
Waveform
-40 to 85
o
C
Min.
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
2.5
2.5
1.5
1.5
3.3
3.3
Max.
9.0
8.0
9.5
8.5
9.5
8.5
8.5
7.5
t
PLH
t
PHL
Propagation Delay Time Dn to Qn
2.7
1
ns
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
3.0 to 3.6
t
PLH
t
PHL
Propagation Delay Time LE to Qn
1
ns
t
PZL
t
PZH
Output Enable Time to HIGH and LOW
level
2
ns
t
PLZ
t
PHZ
Output Disable Time from HIGh and
LOW level
2
ns
t
s
Setup Time, HIGh or LOW level Dn to
LE
1
ns
t
h
Hold Time, HIGh or LOW level Dn to LE
1
ns
t
w
LE Pulse Width, HIGH or LOW
3
ns
t
OSLZ
t
OSHL
Output to Output Skew Time (note 1, 2)
1.0
ns
1) Skew isdefined as the absolute value of the difference between theactual propagation delay forany twooutputs ofthe samedevice switching in the
same direction, either HIGHor LOW (t
OSLH
=|t
PLHm
-t
PLHn
|,t
OSHL
=|t
PHLm
-t
pHLn
|)
2) Parameter guaranteed bydesign
74LCX573
5/10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74LCX574 | Octal Buffers And Line Drivers With 3-State Outputs 20-SSOP -40 to 85 |
| 74LCX574MTR | OCTAL D-TYPE FLIP FLOP NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS |
| 74LCX574TTR | Octal Buffers And Line Drivers With 3-State Outputs 20-SOIC -40 to 85 |
| 74LCX574MSA | Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs |
| 74LCX574 | Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX573_04 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:OCTAL D-TYPE LATCH NON-INVERTING (3-STATE) WITH 5V TOLERANT INPUTS AND OUTPUTS |
| 74LCX573_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
| 74LCX573BQX | 功能描述:閉鎖 OCTAL TRANCEIVER(3V) RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX573BQX_08 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
| 74LCX573BQX2 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage Octal Latch with 5V Tolerant Inputs and Outputs |
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