參數(shù)資料
型號: 74LCX257
廠商: Fairchild Semiconductor Corporation
英文描述: Low Voltage Quad 2-Input Multiplexer with 5V Tolerant Inputs and Outputs
中文描述: 低電壓四2輸入與5V容限輸入和輸出復(fù)用器
文件頁數(shù): 2/9頁
文件大?。?/td> 100K
代理商: 74LCX257
www.fairchildsemi.com
2
7
Functional Description
The LCX257 is a quad 2-input multiplexer with 3-STATE
outputs. It selects four bits of data from two sources under
control of a Common Data Select input. When the Select
input is LOW, the I
0x
inputs are selected and when Select
is HIGH, the I
1x
inputs are selected. The data on the
selected inputs appears at the outputs in true (non
inverted) form. The device is the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select input.
The logic equations for the outputs are shown below:
Z
a
=
OE
(1
1a
S
+
I
0a
S)
Z
b
=
OE
(1
1b
S
+
I
0b
S)
Z
c
=
OE
(1
1c
S
+
I
0c
S)
Z
d
=
OE
(1
1d
S
+
I
0d
S)
When the Output Enable (OE) is HIGH, the outputs are
forced to a high impedance state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maxi-
mum ratings. Designers should ensure the Output Enable
signals to 3-STATE devices whose outputs are tied
together are designed so there is no overlap.
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Output
Select
Data
Outputs
Enable
Input
Inputs
OE
S
I
0
I
1
Z
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
L
X
L
L
L
H
X
H
相關(guān)PDF資料
PDF描述
74LCX257MTCX 2-Input Digital Multiplexer
74LCX257MX 2-Input Digital Multiplexer
74LCX257SJX 2-Input Digital Multiplexer
74LCX27M Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
74LCX27SJ Low Voltage Triple 3-Input NOR Gate with 5V Tolerant Inputs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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