參數(shù)資料
型號: 74HCT7245
廠商: NXP Semiconductors N.V.
英文描述: Dual 4-Input Positive-NAND Gates 14-SO -40 to 85
中文描述: 八路總線施密特觸發(fā)器收發(fā)器,三態(tài)
文件頁數(shù): 2/7頁
文件大?。?/td> 42K
代理商: 74HCT7245
December 1990
2
Philips Semiconductors
Product specification
Octal bus Schmitt-trigger transceiver;
3-state
74HC/HCT7245
FEATURES
Octal bidirectional bus interface
Non-inverting 3-state outputs
Output capability: bus driver
I
CC
category: MSI
Schmitt-trigger action on all data
inputs
GENERAL DESCRIPTION
The 74HC/HCT7245 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard
no. 7A.
The 74HC/HCT7245 are octal
transceivers featuring non-inverting
3-state bus compatible outputs in
both send and receive directions. The
“7245” features an output enable
(OE) input for easy cascading and a
send/receive input (DIR) for direction
control. OE controls the outputs so
that the buses are effectively isolated.
The 74HC/HCT7245 have
Schmitt-trigger inputs. These inputs
are capable of transforming slowly
changing input signals into sharply
defined jitter-free output signals.
The “7245” is identical to the “245” but
has hysteresis on the data inputs.
FUNCTION TABLE
Notes
1.
H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
INPUTS
INPUTS/OUTPUTS
OE
DIR
A
n
A = B
inputs
Z
B
n
inputs
B = A
Z
L
L
H
L
H
X
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
C
I
C
I/O
C
PD
propagation delay A
n
to B
n
input capacitance
input/output capacitance
power dissipation capacitance per transceiver
C
L
= 15 pF; V
CC
= 5 V
8
3.5
10
40
12
3.5
10
40
ns
pF
pF
pF
notes 1 and 2
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