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參數(shù)資料
| 型號： | 74HCT4515 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 4-to-16 line decoder/demultiplexer with input latches；inverting(帶輸入鎖存的4-16線譯碼器/多路分解器 ；反相) |
| 中文描述： | 4至16線譯碼器/多路解復(fù)用器的輸入鎖存器，反相（帶輸入鎖存的4-16線譯碼器/多路分解器;反相） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 64K |
| 代理商： | 74HCT4515 |
September 1993
2
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer with
input latches; inverting
74HC/HCT4515
FEATURES
Inverting outputs
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4515 are high-speed Si-gate CMOS
devices and are pin compatible with “4515” of the “4000B”
series. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4515 are 4-to-16 line
decoders/demultiplexers having four binary weighted
address inputs (A
0
to A
3
) with latches, a latch enable input
(LE), and an active LOW enable input (E). The 16 inverting
outputs (Q
0
to Q
15
) are mutually exclusive active LOW.
When LE is HIGH, the selected output is determined by the
data on A
n
. When LE goes LOW, the last data present at
A
n
are stored in the latches and the outputs remain stable.
When E is LOW, the selected output, determined by the
contents of the latch, is LOW. When E is HIGH, all outputs
are HIGH. The enable input (E) does not affect the state of
the latch.
When the “4515” is used as a demultiplexer, E is the data
input and A
0
to A
3
are the address inputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+
∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
C
I
C
PD
propagation delay A
n
to Q
n
input capacitance
power dissipation capacitance per package
C
L
= 15 pF; V
CC
= 5 V
25
3.5
44
26
3.5
46
ns
pF
pF
notes 1 and 2
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PDF描述 |
|---|---|
| 74HC4515 | 4-to-16 line decoder/demultiplexer with input latches; inverting |
| 74HC4515DB | 4-to-16 line decoder/demultiplexer with input latches; inverting |
| 74HC4515PW | 4-to-16 line decoder/demultiplexer with input latches; inverting |
| 74HCT4515DB | 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85 |
| 74HCT4516 | 4-Bit Synchronous Up/Down Binary Counters 16-SOIC -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HCT4515D | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 4-16 DECODER/MUX W/LATCHES RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74HCT4515D,652 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 4-16 DECODER/MUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74HCT4515D,653 | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 4-16 DECODER/MUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74HCT4515D-T | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 4-16 DECODER/MUX W/LATCHES RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| 74HCT4515N | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 4-16 DECODER/MUX W/LATCHES RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
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