參數(shù)資料
型號(hào): 74HCT4066
廠(chǎng)商: NXP Semiconductors N.V.
英文描述: Quad bilateral switches
中文描述: 四雙邊開(kāi)關(guān)
文件頁(yè)數(shù): 2/24頁(yè)
文件大?。?/td> 175K
代理商: 74HCT4066
1998 Nov 10
2
Philips Semiconductors
Product specification
Quad bilateral switches
74HC/HCT4066
FEATURES
Very low “ON” resistance:
50
(typ.) at V
CC
= 4.5 V
45
(typ.) at V
CC
= 6.0 V
35
(typ.) at V
CC
= 9.0 V
Output capability: non-standard
I
CC
category: SSI.
GENERAL DESCRIPTION
The 74HC/HCT4066 are high-speed Si-gate CMOS
devices and are pin compatible with the “4066” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4066 have four independent analog
switches. Each switch has two input/output terminals (nY,
nZ) and an active HIGH enable input (nE). When nE is
LOW the belonging analog switch is turned off.
The “4066” is pin compatible with the “4016” but exhibits a
much lower “ON” resistance. In addition, the “ON”
resistance is relatively constant over the full input signal
range.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
a) P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
{(C
L
+
C
S
) ×
V
CC2
×
f
o
} where:
b) f
i
= input frequency in MHz
c) f
o
= output frequency in MHz
d)
{(C
L
+
C
S
) ×
V
CC2
×
f
o
} = sum of outputs
e) C
L
= output load capacitance in pF
f) C
S
= maximum switch capacitance in pF
g) V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PZH
/ t
PZL
t
PHZ
/ t
PLZ
C
I
C
PD
C
S
turn-on time nE to V
os
turn-off time nE to V
os
input capacitance
power dissipation capacitance per switch
max. switch capacitance
C
L
= 15 pF; R
L
= 1 k
; V
CC
= 5 V
11
13
3.5
11
8
12
16
3.5
12
8
ns
ns
pF
pF
pF
notes 1 and 2
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