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參數(shù)資料
| 型號： | 74HCT165 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 8-bit parallel-in/serial-out shift register(8位并入/串出移位寄存器) |
| 中文描述： | 8位parallel-in/serial-out移位寄存器（8位并入/串出移位寄存器） |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 73K |
| 代理商： | 74HCT165 |
December 1990
2
Philips Semiconductors
Product specification
8-bit parallel-in/serial-out shift register
74HC/HCT165
FEATURES
Asynchronous 8-bit parallel load
Synchronous serial input
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT165 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT165 are 8-bit parallel-load or serial-in shift
registers with complementary serial outputs (Q
7
and
Q
7
) available from the last stage. When the parallel load
(PL) input is LOW, parallel data from the D
0
to
D
7
inputs are loaded into the register asynchronously.
When PL is HIGH, data enters the register serially at the
D
s
input and shifts one place to the right
(Q
0
→
Q
1
→
Q
2
, etc.) with each positive-going clock
transition. This feature allows parallel-to-serial converter
expansion by tying the Q
7
output to the D
S
input of the
succeeding stage.
The clock input is a gated-OR structure which allows one
input to be used as an active LOW clock enable (CE) input.
The pin assignment for the CP and CE inputs is arbitrary
and can be reversed for layout convenience. The
LOW-to-HIGH transition of input CE should only take
place while CP HIGH for predictable operation. Either the
CP or the CE should be HIGH before the
LOW-to-HIGH transition of PL to prevent shifting the data
when PL is activated.
APPLICATIONS
Parallel-to-serial data conversion
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
∑
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
CP to Q
7,
Q
7
PL to Q
7,
Q
7
D
7
to Q
7,
Q
7
maximum clock frequency
input capacitance
power dissipation capacitance per
package
C
L
= 15 pF; V
CC
= 5 V
16
15
11
56
3.5
35
14
17
11
48
3.5
35
ns
ns
ns
MHz
pF
pF
f
max
C
I
C
PD
notes 1 and 2
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74HCT165BQ | 制造商:NXP Semiconductors 功能描述:Cut Tape 制造商:NXP Semiconductors 功能描述:IC 8BIT SHIFT REGISTER 16-D 制造商:NXP Semiconductors 功能描述:IC, 8BIT, SHIFT REGISTER, 16-DHVQFN 制造商:NXP Semiconductors 功能描述:Shift Register Single 8-Bit Serial/Parallel to Serial 16-Pin DHVQFN EP T/R |
| 74HCT165BQ,115 | 功能描述:計(jì)數(shù)器移位寄存器 8-BIT S/PI-SO SHIFT RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74HCT165BQ115 | 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
| 74HCT165BQ-G | 功能描述:計(jì)數(shù)器移位寄存器 8-BIT S/PI-SO SHIFT REGISTER RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| 74HCT165BQ-Q100,11 | 制造商:NXP Semiconductors 功能描述:Shift Register Single 8-Bit Serial/Parallel to Serial 16-Pin DHVQFN EP T/R 制造商:NXP Semiconductors 功能描述:74HCT165BQ-Q100/DHVQFN16/REEL7 - Tape and Reel 制造商:NXP Semiconductors 功能描述:IC SHIFT REGISTER 8BIT 16DHVQFN |
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