參數(shù)資料
型號: 74HCT164
廠商: NXP Semiconductors N.V.
英文描述: 8-bit serial-in/parallel-out shift register(8位串入并出移位寄存器)
中文描述: 8位serial-in/parallel-out移位寄存器(8位串入并出移位寄存器)
文件頁數(shù): 2/8頁
文件大小: 54K
代理商: 74HCT164
December 1990
2
Philips Semiconductors
Product specification
8-bit serial-in/parallel-out shift register
74HC/HCT164
FEATURES
Gated serial data inputs
Asynchronous master reset
Output capability: standard
I
CC
category: MSI
GENERAL DESCRIPTION
The 74HC/HCT164 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT164 are 8-bit edge-triggered shift registers
with serial data entry and an output from each of the eight
stages.
Data is entered serially through one of two inputs (D
sa
or
D
sb
); either input can be used as an active HIGH enable for
data entry through the other input.
Both inputs must be connected together or an unused
input must be tied HIGH.
Data shifts one place to the right on each LOW-to-HIGH
transition of the clock (CP) input and enters into Q
0
, which
is the logical AND of the two data inputs (D
sa
,D
sb
) that
existed one set-up time prior to the rising clock edge.
A LOW level on the master reset (MR) input overrides all
other inputs and clears the register asynchronously,
forcing all outputs LOW.
QUICK REFERENCE DATA
GND = 0 V; T
amb
= 25
°
C; t
r
= t
f
= 6 ns
Notes
1.
C
PD
is used to determine the dynamic power dissipation (P
D
in
μ
W):
P
D
= C
PD
×
V
CC2
×
f
i
+ ∑
(C
L
×
V
CC2
×
f
o
) where:
f
i
= input frequency in MHz
f
o
= output frequency in MHz
(C
L
×
V
CC2
×
f
o
) = sum of outputs
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
For HC the condition is V
I
= GND to V
CC
For HCT the condition is V
I
= GND to V
CC
1.5 V
2.
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
t
PHL
/ t
PLH
propagation delay
CP to Q
n
MR to Q
n
maximum clock frequency
input capacitance
power dissipation capacitance per
package
C
L
= 15 pF; V
CC
= 5 V
12
11
78
3.5
14
16
61
3.5
ns
ns
MHz
pF
f
max
C
I
C
PD
notes 1 and 2
40
40
pF
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