參數(shù)資料
型號(hào): 74HC4538A
廠商: Motorola, Inc.
元件分類: 參考電壓二極管
英文描述: Low Current Operation at 250 ,Low Reverse Leakage,Low Noise Zener Diode
中文描述: 250 的低電流運(yùn)算,低反向泄露,低噪聲穩(wěn)壓二極管
文件頁(yè)數(shù): 9/13頁(yè)
文件大?。?/td> 368K
代理商: 74HC4538A
MC54/74HC4538A
High–Speed CMOS Logic Data
DL129 — Rev 6
3–9
MOTOROLA
CIRCUIT OPERATION
Figure 12 shows the HC4538A configured in the retrigger-
able mode. Briefly, the device operates as follows (refer to
Figure 10): In the quiescent state, the external timing capac-
itor, Cx, is charged to VCC. When a trigger occurs, the Q out-
put goes high and Cx discharges quickly to the lower
reference voltage (Vref Lower
through Rx, back up to the upper reference voltage (Vref Up-
per
2/3 VCC), at which point the one–shot has timed out
and the Q output goes low.
The following, more detailed description of the circuit op-
eration refers to both the logic detail (Figure 9) and the timing
diagram (Figure 10).
1/3 VCC). Cx then charges,
QUIESCENT STATE
In the quiescent state, before an input trigger appears, the
output latch is high and the reset latch is high (#1 in Fig-
ure 10). Thus the Q output (pin 6 or 10) of the monostable
multivibrator is low (#2, Figure 10).
The output of the trigger–control circuit is low (#3), and
transistors M1, M2, and M3 are turned off. The external tim-
ing capacitor, Cx, is charged to VCC (#4), and both the upper
and lower reference circuit has a low output (#5).
In addition, the output of the trigger–control reset circuit is
low.
TRIGGER OPERATION
The HC4538A is triggered by either a rising–edge signal at
input A (#7) or a falling–edge signal at input B (#8), with the
unused trigger input and the Reset input held at the voltage
levels shown in the Function Table. Either trigger signal will
cause the output of the trigger–control circuit to go high (#9).
The trigger–control circuit going high simultaneously initi-
ates two events. First, the output latch goes low, thus taking
the Q output of the HC4538A to a high state (#10). Second,
transistor M3 is turned on, which allows the external timing
capacitor, Cx, to rapidly discharge toward ground (#11).
(Note that the voltage across Cx appears at the input of both
the upper and lower reference circuit comparator).
When Cx discharges to the reference voltage of the lower
reference circuit (#12), the outputs of both reference circuits
will be high (#13). The trigger–control reset circuit goes high,
resetting the trigger–control circuit flip–flop to a low state
(#14). This turns transistor M3 off again, allowing Cx to begin
to charge back up toward VCC, with a time constant t = RxCx
(#15). Once the voltage across Cx charges to above the low-
er reference voltage, the lower reference circuit will go low
allowing the monostable multivibrator to be retriggered.
2
18
1
6
5
4
17
14
3
9
8
7
QUIESCENT
STATE
TRIGGER CYCLE
(A INPUT)
TRIGGER CYCLE
(B INPUT)
RESET
RETRIGGER
trr
Vref UPPER
Vref LOWER
TRIGGER INPUT A
(PIN 4 OR 12)
TRIGGER INPUT B
(PIN 5 OR 11)
TRIGGER-CONTROL
CIRCUIT OUTPUT
RX/CX INPUT
(PIN 2 OR 14)
UPPER REFERENCE
CIRCUIT
LOWER REFERENCE
CIRCUIT
RESET INPUT
(PIN 3 OR 13)
RESET LATCH
Q OUTPUT
(PIN 6 OR 10)
Figure 10. Timing Diagram
10
11
12
13
15
16
19
20
21
22
23
24
25
τ
τ
+ trr
13
τ
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