參數(shù)資料
型號(hào): 74HC4510DB
廠商: NXP SEMICONDUCTORS
元件分類: 計(jì)數(shù)器
英文描述: BCD up/down counter
中文描述: HC/UH SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL DECADE COUNTER, PDSO16
文件頁數(shù): 2/12頁
文件大小: 102K
代理商: 74HC4510DB
December 1990
10
Philips Semiconductors
Product specication
BCD up/down counter
74HC/HCT4510
Fig.9
Waveforms showing the preset enable
pulse width, preset enable to output
delays and output transition times.
(1)
HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.10 Waveforms showing the master reset pulse,
master reset to terminal count and Qn delay
and master reset to clock removal time.
(1)
HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.11 Waveforms showing the data set-up and
hold times to parallel load (PL).
(1)
HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
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