參數(shù)資料
型號： 74GTLP2033DGVRE4
廠商： Texas Instruments, Inc.
英文描述： 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
中文描述： 8位LVTTL至GTLP可調EDGE的速率收發(fā)器劈開登記LVTTL港口及反饋路徑
文件頁數(shù)： 11/20頁
文件大?。?/td> 367K
代理商： 74GTLP2033DGVRE4
SN74GTLP2033
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER
WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SCES352C
–
JUNE 2001
–
REVISED SEPTEMBER 2001
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, V
TT
= 1.5 V and V
REF
= 1 V for GTLP (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
EDGE RATE
MIN
TYP
MAX
UNIT
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
175
MHz
AI
B
Slow
3
7.4
ns
(buffer)
3
7.1
AI
B
Fast
2
5.9
ns
(buffer)
2
5.8
B
AO
1
5.7
ns
(buffer)
–
1
5
LEAB
B
Slow
4.2
8.6
ns
(latch mode)
3.2
7.7
LEAB
B
Fast
3.2
7.6
ns
(latch mode)
2.8
6.7
LEAB
AO
2
7
ns
(latch mode)
–
1.8
6.3
LEBA
AO
1
5.7
ns
(latch mode)
–
1
4.7
OEAB
B
Slow
3.8
7.5
ns
3.1
7
OEAB
B
Fast
2.5
6
ns
2.5
6
OEAB
B
Slow
3.5
7.5
ns
3
7.2
OEAB
B
Fast
2.5
6
ns
2.5
6
OEBA
AO
1
4.7
ns
–
1
3.4
OEBA
AO
1
5.2
ns
–
1
4.9
CLKAB
B
Slow
4.4
8.8
ns
(flip-flop mode)
3.6
8.1
CLKAB
B
Fast
3.2
7.2
ns
(flip-flop mode)
3.1
6.9
CLKAB
AO
2
6.9
ns
(flip-flop mode)
–
1.8
6.4
CLKBA
AO
1
5.6
ns
(flip-flop mode)
–
1
4.9
OMODE
B
Slow
3.8
8.7
ns
3.2
8.2
OMODE
B
Fast
2.7
7.2
ns
2.7
7.2
IMODE
AO
1
1
5.6
4.6
ns
–
Slow (ERC = H) and Fast (ERC = L)
All typical values are at VCC = 3.3 V, TA = 25
°
C.
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