- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄369305 > 74GTL1655 (Texas Instruments, Inc.) 16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION PDF資料下載
參數(shù)資料
| 型號： | 74GTL1655 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION |
| 中文描述： | 16位LVTTL-TO-GTL/GTL通用總線收發(fā)器與帶電插入 |
| 文件頁數(shù)： | 2/16頁 |
| 文件大小： | 266K |
| 代理商： | 74GTL1655 |
SN54GTL1655, SN74GTL1655
16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS
WITH LIVE INSERTION
SCBS696E – JULY 1997 – REVISED NOVEMBER 1999
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
The user has the flexibility of using this device at either GTL (V
TT
= 1.2 V and V
REF
= 0.8 V) or the preferred
higher noise margin GTL+ (V
TT
= 1.5 V and V
REF
= 1 V) signal levels. GTL+ is the Texas Instruments derivative
of the Gunning transceiver logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or
GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels but are not 5-V
tolerant. V
REF
is the reference input voltage for the B port.
These devices are uniquely partitioned as two 8-bit transceivers with individual latch timing and output signals,
but with a common clock and output enable inputs for both transceiver words.
Data flow for each word is determined by the respective latch enables (xLEAB and xLEBA), output enables
(xOEAB and xOEBA), and clock (CLK). The output enables (1OEAB, 1OEBA, 2OEAB, and 2OEBA) control
byte 1 and byte 2 data for the A-to-B and B-to-A directions, respectively.
For A-to-B data flow, the devices operate in the transparent mode when LEAB is high. When LEAB transitions
low, the A data is latched independent of CLK high or low. If LEAB is low, the A data is registered on the CLK
low-to-high transition. When OEAB is low, the outputs are active. With OEAB high, the outputs are in the
high-impedance state.
Data flow for the B-to-A direction is identical, but uses OEBA, LEBA, and CLK. Note that CLK is common to both
directions and both 8-bit words. OE is also common and is used to disable all I/O ports simultaneously.
The ’GTL1655 is featured with adjustable edge-rate control (V
ERC
). Changing V
ERC
input voltage between GND
and V
CC
adjusts the B-port output rise and fall times. This allows the designer to optimize for various loading
conditions.
These devices are fully specified for live-insertion applications using I
off
, power-up 3-state, and BIAS V
CC
. The
I
off
circuitry disables the outputs, preventing damaging current backflow through the device when it is powered
down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power
down, which prevents driver conflict. The BIAS V
CC
circuitry precharges and preconditions the B-port
input/output connections, preventing disturbance of active data on the backplane during card insertion or
removal, and permits true live-insertion capability.
When V
CC
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven LVTTL inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
The SN54GTL1655 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74GTL1655 is characterized for operation from –40
°
C to 85
°
C.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74GTLP2033DGVRE4 | 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH |
| 74GTLP22034DGGRE4 | 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH |
| 74GTLP22034DGVRE4 | 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH |
| 74H1G66 | SINGLE BILATERAL SWITCH |
| 74H1G66S | SINGLE BILATERAL SWITCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74GTL1655A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:16 BIT LVTTL TO GTL/GTL + UNIVERSAL BUS TRANSCEIVERS WITH LIVE INSERTION |
| 74GTL1655ATTR | 制造商:STMicroelectronics 功能描述: |
| 74GTL1655TTR | 功能描述:總線收發(fā)器 16-Bit Bus Transcvr RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74GTL16612DGGRE4 | 功能描述:轉(zhuǎn)換 - 電壓電平 18B LVTTL-GTL/GTL Univ Bus Trans RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| 74GTL16612DGGRG4 | 功能描述:轉(zhuǎn)換 - 電壓電平 18B LVTTL-to-GTL/GTL Univ Bus Xceivers RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。