
Philips Semiconductors
Product specification
74F821/822/823/824/825/826
Bus interface registers
1996 Jan 05
12
AC ELECTRICAL CHARACTERISTICS FOR 74F823
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500
MIN
T
amb
= –40
°
C to +85
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500
MIN
UNIT
MAX
MAX
MAX
f
max
t
PLH
t
PHL
Maximum clock frequency
Waveform 1
150
180
140
130
ns
Propagation delay
CP to Qn or Qn
Propagation delay
MR to Qn or Qn
Output enable time
OEn to Qn or Qn
Output disable time
OEn to Qn or Qn
Waveform 1
4.0
4.0
6.5
6.0
8.5
8.5
4.0
3.5
9.5
9.0
4.0
3.5
10.0
9.0
ns
t
PHL
Waveform 2
3.0
5.0
8.0
3.0
8.0
3.0
8.5
ns
t
PZH
t
PZL
t
PHZ
t
PLZ
Waveform 4
Waveform 5
Waveform 4
Waveform 5
2.0
3.0
1.5
1.5
4.5
5.0
3.5
3.5
8.0
8.0
6.5
6.5
2.0
2.5
1.5
1.5
9.0
9.0
7.5
7.5
2.0
2.5
1.5
1.5
11.0
9.0
8.5
8.5
ns
ns
AC SETUP REQUIREMENTS FOR 74F823
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF
R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500
MIN
T
amb
= –40
°
C to +85
°
C
CC
= +5.0V
±
10%
C
L
= 50pF
R
L
= 500
MIN
UNIT
MAX
MAX
MAX
t
su
(H)
t
su
(L)
t
h
(H
)
t
h
(
L
)
t
w
(H)
t
w
(L)
t
su
(H)
t
su
(L)
t
h
(H
)
t
h
(
L
)
Setup time, high or low
Dn to CP
Hold time, high or low
Dn to CP
CP Pulse width,
high or low
Setup time, high or low,
CE to CP
Hold time, high or low
CE to CP
MR Pulse width,
low
Recovery time,
MR to CP
Waveform 3
1.0
1.0
2.0
2.0
3.5
3.5
0.0
2.0
0.0
3.0
1.0
1.0
2.0
2.0
4.0
4.0
0.0
2.0
0.0
3.5
2.0
1.5
2.5
2.0
4.0
4.0
0.0
2.0
1.5
4.0
ns
Waveform 3
ns
Waveform 1
ns
Waveform 3
ns
Waveform 3
ns
t
w
(L)
Waveform 2
4.5
4.5
4.5
ns
t
rec
Waveform 2
2.5
2.5
2.5
ns