參數(shù)資料
型號(hào): 74F50728
廠商: NXP Semiconductors N.V.
英文描述: Synchronizing cascaded dual positive edge-triggered D-type flip-flop
中文描述: 同步串聯(lián)雙上升沿觸發(fā)D型觸發(fā)器
文件頁(yè)數(shù): 8/12頁(yè)
文件大?。?/td> 89K
代理商: 74F50728
Philips Semiconductors
Product specification
74F50728
Synchronizing cascaded dual positive
edge-triggered D-type flip-flop
September 14, 1990
8
TEST CIRCUIT AND WAVEFORMS
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
2.5ns
t
THL
2.5ns
1MHz
500ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
C
L
=
R
T
=
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
SF00006
相關(guān)PDF資料
PDF描述
74F50729 Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
74F5074 Synchronizing dual D-type flip-flop/clock driver(同步雙D觸發(fā)器/時(shí)鐘驅(qū)動(dòng)器)
74F51SCX 2/2-input and 3/3-input AND-NOR Gate
74F51SJX 2/2-input and 3/3-input AND-NOR Gate
74F51 Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate(雙2位寬,2輸入,2方式 ,3輸入與或非門)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74F50729 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
74F5074 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Synchronizing dual D-type flip-flop/clock driver
74F5074D 制造商:SGS 功能描述:74F5074 SGS S1I2B 制造商:NXP Semiconductors 功能描述:
74F5074N 制造商:NXP Semiconductors 功能描述:
74F51 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual 2-wide 2-input, 2-wise 3-input AND-OR-invert gate