參數(shù)資料
型號(hào): 74F1763
廠商: NXP Semiconductors N.V.
英文描述: Intelligent DRAM controller IDC
中文描述: IDC的智能內(nèi)存控制器
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 117K
代理商: 74F1763
Philips Semiconductors
Product specification
74F1763
Intelligent DRAM controller (IDC)
1999 Jan 08
11
TIMING DIAGRAMS (Continued)
NOTE 1
: If the RA0–9 and CA0–9 address inputs are not latched, RA0–9 inputs should remain valid until row address hold time is met and CA0–9 inputs should remain valid until column
address hold time is met.
NOTE 2
: MA0–9 outputs will contain the present row address on the RA0–RA9 inputs or the last row address latched into the device.
NOTE 3
: PAGE input may be asserted anytime before this rising clock edge in order to hold RAS low.
15
HLDROW = 0
CP
REQ
GNT
ALE
RA0–9,
CA0–9
MA0–9
RAS
CAS
DTACK
PAGE
SF01406
NOTE 2
VALID
ADDRESS
VALID COLUMN ADDRESS
NOTE 3
7
8
9
10
11
13
14
16
12
HLDROW = 1
17
18
19
20
21
22
23
25
26
PAGE = 1
24
27
28
29
31
32
3-STATE
3-STATE
REFRESH
ADDRESS
REFRESH
ADDRESS
VALID ROW ADDRESS
PRECHRG = 0
PRECHRG = 1
35
36
Figure 4. Memory access cycle timing following a refresh cycle
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
74F1779 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit bidirectional binary counter -State
74F1804 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hex 2-input NAND drivers
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74F1808 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Hex 2-input AND drivers
74F1808N 制造商:NXP Semiconductors 功能描述: