參數(shù)資料
型號(hào): 74AHC1G07GW,165
廠商: NXP Semiconductors
文件頁(yè)數(shù): 7/11頁(yè)
文件大?。?/td> 0K
描述: IC BUFF N-INV OP/DRAIN 5TSSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 10,000
系列: 74AHC
邏輯類型: 緩沖器/線路驅(qū)動(dòng)器,非反相并帶開(kāi)漏極
元件數(shù): 1
每個(gè)元件的位元數(shù): 1
輸出電流高,低: 8mA,8mA
電源電壓: 2 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP(5 引線),SC-88A,SOT-353
供應(yīng)商設(shè)備封裝: 5-TSSOP
包裝: 帶卷 (TR)
其它名稱: 74AHC1G07GW-R
74AHC1G07GW-R-ND
935267470165
74AHC_AHCT1G07_6
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 06 — 7 June 2007
5 of 11
NXP Semiconductors
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
11. Dynamic characteristics
[1]
Typical values are measured at VCC = 3.3 V.
[2]
Typical values are measured at VCC = 5.0 V.
[3]
CPD is used to determine the dynamic power dissipation PD (W).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts
Table 8.
Dynamic characteristics
GND = 0 V; tr = tf = ≤ 3.0 ns. For test circuit see Figure 6.
Symbol
Parameter
Conditions
25
°C
40 °C to +85 °C 40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
For type 74AHC1G07
tPZL
OFF-state
to LOW
propagation
delay
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
3.5
5.6
1.0
6.3
1.0
7.0
ns
CL = 50 pF
-
5.0
8.0
1.0
9.0
1.0
10.0
ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
2.5
3.9
1.0
4.6
1.0
4.9
ns
CL = 50 pF
-
3.6
5.5
1.0
6.5
1.0
7.0
ns
tPLZ
LOW to
OFF-state
propagation
delay
A to Y; see Figure 5
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
5.8
7.9
1.0
8.4
1.0
8.9
ns
CL = 50 pF
-
8.3
11.5
1.0
12.0
1.0
12.5
ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
4.2
5.1
1.0
5.6
1.0
6.1
ns
CL = 50 pF
-
6.0
7.5
1.0
8.0
1.0
8.5
ns
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
-5-
-
pF
For type 74AHCT1G07
tPZL
OFF-state
to LOW
propagation
delay
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
2.8
4.6
1.0
5.3
1.0
5.6
ns
CL = 50 pF
-
4.0
6.5
1.0
7.5
1.0
8.0
ns
tPLZ
LOW to
OFF-state
propagation
delay
A to Y; see Figure 5
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
3.9
5.6
1.0
6.1
1.0
6.6
ns
CL = 50 pF
-
5.5
8.0
1.0
8.5
1.0
9.0
ns
CPD
power
dissipation
capacitance
per buffer;
CL = 50 pF; f = 1 MHz;
VI = GND to VCC
-
6.5
-
pF
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