參數(shù)資料
型號: 74ACTQ843SPC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Quiet Seriesa⑩ 9-Bit Transparent Latch with 3-STATE Outputs
中文描述: ACT SERIES, 9-BIT DRIVER, TRUE OUTPUT, PDIP24
封裝: 0.300 INCH, PLASTIC, MS-001, DIP-24
文件頁數(shù): 4/8頁
文件大小: 69K
代理商: 74ACTQ843SPC
www.fairchildsemi.com
4
7
DC Electrical Characteristics
(Continued)
Note 2:
All outputs loaded; thresholds on input associated with output under test.
Note 3:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 4:
DIP package.
Note 5:
Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND.
Note 6:
Max number of data inputs (n) switching. (n
1) inputs switching 0V to 3V. Input-under-test switching:
3V to threshold (V
ILD
), 0V to threshold (V
IHD
), f
=
1 MHz.
AC Electrical Characteristics
Note 7:
Voltage Range 5.0 is 5.0V
±
0.5V.
Note 8:
Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs within the same packaged device.
The specification applies to any outputs switching in the same direction, either HIGH to LOW (t
OSHL
) or LOW to HIGH (t
OSLH
). Parameter guaranteed by
design. Not tested.
V
CC
T
A
=
+
25
°
C
C
L
=
50 pF
Typ
6.2
T
A
=
40
°
C to
+
85
°
C
C
L
=
50 pF
Min
2.0
Symbol
Parameter
(V)
Units
(Note 7)
5.0
Min
2.5
Max
9.5
Max
10.0
t
PLH
Propagation Delay
D
n
to O
n
Propagation Delay
D
n
to O
n
Propagation Delay
ns
t
PHL
5.0
2.5
6.7
9.5
2.0
10.0
ns
t
PLH
5.0
2.5
7.1
9.0
2.0
10.0
ns
LE to O
n
Propagation Delay
LE to O
n
Propagation Delay
t
PHL
5.0
2.5
6.9
9.0
2.0
10.0
ns
t
PLH
5.0
2.5
7.3
10.0
2.0
11.0
ns
PRE to O
n
Propagation Delay
t
PHL
5.0
2.5
7.2
11.0
2.0
12.0
ns
CLR to O
n
Output Enable Time
t
PZH
5.0
2.5
7.2
9.5
2.0
10.5
ns
OE to O
n
Output Enable Time
t
PZL
5.0
2.5
7.5
9.5
2.0
10.5
ns
OE to O
n
Output Disable Time
t
PHZ
5.0
1.5
5.0
8.0
1.0
8.5
ns
OE to O
n
Output Disable Time
t
PLZ
5.0
1.5
5.1
8.0
1.0
8.5
ns
OE to O
n
Propagation Delay
t
PHL
5.0
2.5
6.7
10.0
2.0
11.0
ns
PRE to O
n
Propagation Delay
t
PLH
5.0
2.5
7.3
11.0
2.0
12.0
ns
CLR to O
n
Output to Output Skew (Note 8)
D
n
to O
n
t
OSLH
t
OSHL
5.0
0.5
1.5
1.5
ns
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