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參數(shù)資料
| 型號(hào)： | 74ACT11800 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Triple 4-Input AND/Nand Gates(三4輸入與/與非門(mén)) |
| 中文描述： | 三4輸入與/與非門(mén)（三4輸入與/與非門(mén)） |
| 文件頁(yè)數(shù)： | 4/5頁(yè) |
| 文件大?。?/td> | 107K |
| 代理商： | 74ACT11800 |
54ACT11800, 74ACT11800
TRIPLE 4–INPUT AND/NAND GATES
SCAS245 – JULY 1990 – REVISED AUGUST 1992
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR OUTPUTS
S1
2
×
VCC
Open
GND
500
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2
×
VCC
GND
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
×
VCC
(see Note C)
Output
Waveform 2
S1 at 2
×
VCC
(see Note C)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
≈
VCC
0 V
50% VCC
0 V
3 V
Data Input
Timing Input
1.5 V
3 V
0 V
1.5 V
1.5 V
3 V
0 V
3 V
0 V
1.5 V
1.5 V
tw
Input
50% VCC
20% VCC
80% VCC
tPLH
tPHL
1.5 V
1.5 V
3 V
0 V
50% VCC
50% VCC
VOH
VOL
Input
(see Note B)
Output
(see Note D)
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, Zo = 50
, tr
≤
3 ns, tf
≤
3 ns.
For testing pulse duration: tr = tf = 1 to 3 ns. Pulse polarity can be either high-to-low-to-high or low-to-high-to-low.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
P
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