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| 型號： | 74ACT11074DB |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET |
| 中文描述： | 雙上升沿觸發(fā)的D型倒裝有明確和預(yù)設(shè)次浮點運算 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大小： | 81K |
| 代理商： | 74ACT11074DB |
74ACT11074
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCAS498A – DECEMBER 1986 – REVISED APRIL 1996
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
MIN
MAX
UNIT
MIN
4.4
MAX
IOH= 50 A
IOH = –50 A
4.5 V
4.4
5.5 V
5.4
5.4
VOH
IOH= 24 mA
IOH = –24 mA
4.5 V
3.94
3.8
V
5.5 V
4.94
4.8
IOH = –75 mA
5.5 V
3.85
IOL= 50 A
IOL = 50 A
4.5 V
0.1
0.1
5.5 V
0.1
0.1
VOL
IOL= 24 mA
IOL = 24 mA
4.5 V
0.36
0.44
V
5.5 V
0.36
0.44
IOL = 75 mA
VI = VCC or GND
VI = VCC or GND,
One input at 3.4 V,
5.5 V
1.65
±
1
40
II
ICC
ICC
Ci
5.5 V
±
0.1
A
IO = 0
Other inputs at GND or VCC
5.5 V
4
A
5.5 V
0.9
1
mA
VI = VCC or GND
5 V
3.5
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended ranges of supply voltage and free-air temperature (unless
otherwise noted) (see Figure 1)
TA = 25
°
C
MIN
MIN
MAX
UNIT
MAX
fclock
Clock frequency
0
100
0
100
MHz
tw
Pulse duration
PRE or CLR low
5
5
ns
CLK low or high
5
5
tsu
Set p time before CLK
Setup time before CLK
↑
Data high or low
4.5
4.5
ns
PRE or CLR inactive
2
2
th
Hold time after CLK
↑
0
0
ns
switching characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
TA = 25
°
C
TYP
MIN
MAX
UNIT
(OUTPUT)
MIN
MAX
fmax
tPLH
tPHL
tPLH
tPHL
100
125
100
MHz
PRE or CLR
Q or Q
1.5
5.7
8.9
1.5
9.6
ns
1.5
6.6
11.3
1.5
12.5
CLK
Q or Q
1.5
1.5
6
8.5
1.5
1.5
9.4
8.8
ns
5.7
8
operating characteristics, V
CC
= 5 V, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance per flip-flop
CL = 50 pF,
f = 1 MHz
30
pF
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| 74ACT11074DBRG4 | 功能描述:觸發(fā)器 Dual Pos-Edge- Triggered D-Type RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ACT11074DE4 | 功能描述:觸發(fā)器 Dual Pos-Edge-Trig D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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