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參數(shù)資料
| 型號： | 74AC646 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Octal Transceiver/Register with 3-STATE Outputs |
| 中文描述： | 八路收發(fā)器/ 3注冊態(tài)輸出 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 72K |
| 代理商： | 74AC646 |
November 1988
Revised December 1998
7
1999 Fairchild Semiconductor Corporation
DS010132.prf
www.fairchildsemi.com
74AC646 74ACT646
Octal Transceiver/Register with 3-STATE Outputs
General Description
The AC/ACT646 consist of registered bus transceiver cir-
cuits, with outputs, D-type flip-flops and control circuitry
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on
the LOW-to-HIGH transition of the appropriate clock pin
(CPAB or CPBA). The four fundamental data handling
functions available are illustrated in Figure 1, Figure 2, Fig-
ure 3, and Figure 4.
Features
I
Independent registers for A and B buses
I
Multiplexed real-time and stored data transfers
I
3-STATE outputs
I
300 mil dual-in-line package
I
Outputs source/sink 24 mA
I
ACT646 has TTL compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Assignment
for DIP and SOIC
Pin Descriptions
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
74AC646SC
74AC646SPC
74ACT646SPC
Package Number
M24B
N24C
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300” Wide
Pin Names
A
0
–A
7
Description
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
B
0
–B
7
CPAB, CPBA
SAB, SBA
G
DIR
Direction Control Input
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PDF描述 |
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| 74ACT646 | ECONOLINE: RBM - New Micro Size SIP 6 Package- Industry Standard Pinout- 3kVDC Isolation- UL94V-0 Package Material- Efficiency to 85% |
| 74AC648 | Octal Transceiver/Register with 3-STATE Outputs |
| 74AC648SC | Single 8-Bit Inverting Bus Transceiver |
| 74AC648SCX | CMOS, Buffered, 12-Bit Multiplying DAC |
| 74AC648SPC | Single 8-Bit Inverting Bus Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74AC646SC | 功能描述:總線收發(fā)器 Oct Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74AC646SCX | 功能描述:總線收發(fā)器 Oct Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74AC646SPC | 功能描述:總線收發(fā)器 Oct Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74AC648_XDA3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74AC648SC | 功能描述:總線收發(fā)器 Oct Bus Trans/Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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