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參數(shù)資料
| 型號(hào)： | 74ABT652CMSAX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Industry-Standard, 12-Bit ADC with Reference |
| 中文描述： | ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 5.30 MM, EIAJ TYPE2, SSOP-24 |
| 文件頁(yè)數(shù)： | 7/10頁(yè) |
| 文件大?。?/td> | 92K |
| 代理商： | 74ABT652CMSAX |
7
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7
Skew
(SOIC Package)
Note 14:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH to LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-to-
LOW (t
OST
). This specification is guaranteed but not tested.
Note 15:
Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested
Note 16:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 17:
This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 18:
This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Capacitance
Note 19:
C
I/O
is measured at frequency, f
=
1 MHz, per MIL-STD-883D, Method 3012.
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
8 Outputs Switching
(Note 16)
Max
1.3
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
250 pF
8 Outputs Switching
(Note 17)
Max
2.5
Units
t
OSHL
(Note 14)
Pin to Pin Skew
HL Transitions
ns
t
OSLH
(Note 14)
t
PS
(Note 18)
t
OST
(Note 14)
Pin to Pin Skew
LH Transitions
Duty Cycle
1.0
2.0
ns
2.0
4.0
ns
LH–HL Skew
Pin to Pin Skew
LH/HL Transitions
2.0
4.0
ns
t
PV
(Note 15)
Device to Device Skew
LH/HL Transitions
2.5
4.5
ns
Symbol
Parameter
Typ
Units
Conditions
(T
A
=
25
°
C)
C
IN
C
I/O
(Note 19)
Input Capacitance
I/O Capacitance
5.0
11.0
pF
pF
V
CC
=
0V (non I/O pins)
V
CC
=
5.0V (A
n
, B
n
)
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| 74ABT652CMTC | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT652CMTCX | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT652CSC | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT652CSCX | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT657D | 功能描述:總線收發(fā)器 OCTAL XCVR W/PARITY CHK 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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