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參數(shù)資料
| 型號： | 74ABT646CMTC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal Transceivers and Registers with 3-STATE Outputs |
| 中文描述： | ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 4.40 MM, MO-153, TSSOP-24 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 97K |
| 代理商： | 74ABT646CMTC |
www.fairchildsemi.com
6
7
Extended AC Electrical Characteristics
(SOIC Package)
Note 9:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 10:
This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 11:
This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12:
The 3-STATE delays are dominated by the RC network (500
, 250 pF) on the output and has been excluded from the datasheet.
Skew
(SOIC Package)
Note 13:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 14:
This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 15:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW
-
to
-
HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-
to-LOW (t
OST
). This specification is guaranteed but not tested.
Note 16:
This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 17:
Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested.
Capacitance
Note 18:
C
I/O
is measured at frequency, f
=
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V
–
5.5V
C
L
=
50 pF
8 Outputs Switching
(Note 9)
Min
1.5
1.5
1.5
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V
–
5.5V
C
L
=
250 pF
1 Output Switching
(Note 10)
Min
2.0
2.0
2.0
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V
–
5.5V
C
L
=
250 pF
8 Outputs Switching
(Note 11)
Min
2.5
2.5
2.5
Units
Max
5.5
5.5
6.0
Max
7.5
7.5
7.0
Max
10.0
10.0
9.5
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
Clock to Bus
Propagation Delay
ns
ns
Bus to Bus
Propagation Delay
SBA or SAB to A
n
or B
n
Output Enable Time
1.5
1.5
1.5
6.0
6.0
6.0
2.0
2.0
2.0
7.0
7.5
7.5
2.5
2.5
2.5
9.5
10.0
10.0
ns
1.5
1.5
6.0
6.0
2.0
2.0
8.0
8.0
2.5
2.5
10.5
10.5
ns
OE
n
or DIR to A
n
or B
n
Output Disable Time
OE
n
or DIR to A
n
or B
n
1.5
1.5
6.0
6.0
(Note 12)
(Note 12)
ns
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V
–
5.5V
C
L
=
50 pF
8 Outputs Switching
(Note 13)
Max
1.3
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V
–
5.5V
C
L
=
250 pF
8 Outputs Switching
(Note 14)
Max
2.5
Units
t
OSHL
(Note 15)
t
OSLH
(Note 15)
t
PS
(Note 16)
t
OST
(Note 15)
t
PV
(Note 17)
Pin to Pin Skew, HL Transitions
ns
Pin to Pin Skew, LH Transitions
Duty Cycle, LH
–
HL Skew
Pin to Pin Skew, LH/HL Transitions
1.0
2.0
2.0
2.0
4.0
4.0
ns
ns
ns
Device to Device Skew, LH/HL Transitions
2.5
4.5
ns
Symbol
Parameter
Typ
Units
Conditions
T
A
=
25
°
C
C
IN
C
I/O
(Note 18)
Input Capacitance
Output Capacitance
5
11
pF
pF
V
CC
=
0V (non I/O pins)
V
CC
=
5.0V (A
n
, B
n
)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABT646CMTCX | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT646CSC | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT646CSCX | 功能描述:總線收發(fā)器 Octal Trans and Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT648D | 功能描述:總線收發(fā)器 OCTAL REGISTERED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT648D,602 | 功能描述:總線收發(fā)器 OCTAL REGISTERED RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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