- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375058 > 74ABT574CSC (FAIRCHILD SEMICONDUCTOR CORP) Octal D-Type Flip-Flop with 3-STATE Outputs PDF資料下載
參數(shù)資料
| 型號(hào)： | 74ABT574CSC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 中文描述： | ABT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 120K |
| 代理商： | 74ABT574CSC |
5
www.fairchildsemi.com
7
Extended AC Electrical Characteristics
(SOIC Package)
Note 8:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 9:
This specification is guaranteed but not tested. The limits represent propagation delay with 250 pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 10:
This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 11:
The 3-STATE Delay Times are dominated by the RC network (500
:
, 250 pF) on the output and has been excluded from the datasheet.
Skew
(Note 12)
(SOIC package)
Note 12:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase
(i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.).
Note 13:
This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 14:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-
to-LOW (t
OST
). This specification is guaranteed but not tested.
Note 15:
This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 16:
Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested.
Capacitance
Note 17:
C
OUT
is measured at frequency f
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
40
q
C to 85
q
C
V
CC
4.5V to 5.5V
C
L
50 pF
8 Outputs Switching
(Note 8)
Min
1.5
1.5
1.5
T
A
40
q
C to 85
q
C
V
CC
4.5V to 5.5V
C
L
250 pF
(Note 9)
T
A
40
q
C to 85
q
C
V
CC
4.5V to 5.5V
C
L
250 pF
8 Outputs Switching
(Note 10)
Min
2.0
2.0
2.0
Units
Max
5.7
5.7
6.2
Min
2.0
2.0
2.0
Max
7.8
7.8
8.0
Max
10.0
10.0
10.5
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
CP to O
n
Output Enable Time
ns
ns
1.5
1.0
1.0
6.2
5.5
5.5
2.0
8.0
2.0
10.5
Output Disable Time
(Note 11)
(Note 11)
ns
Symbol
Parameter
T
A
40
q
C to 85
q
C
V
CC
4.5V–5.5V
C
L
50 pF
8 Outputs Switching
(Note 12)
Max
T
A
40
q
C to 85
q
C
V
CC
4.5V–5.5V
C
L
250 pF
8 Outputs Switching
(Note 13)
Max
Units
t
OSHL
(Note 14)
t
OSLH
(Note 14)
t
PS
(Note 15)
Pin to Pin Skew
HL Transitions
Pin to Pin Skew
1.0
1.8
ns
1.0
1.8
ns
LH Transitions
Duty Cycle
LH
–
HL Skew
1.8
4.3
ns
t
OST
(Note 14)
t
PV
(Note 16)
Pin to Pin Skew
LH/HL Transitions
Device to Device Skew
2.0
4.3
ns
2.5
4.6
ns
LH/HL Transitions
Symbol
Parameter
Typ
Units
Conditions
T
A
25
q
C
C
IN
C
OUT
(Note 17)
Input Capacitance
5.0
pF
V
CC
0V
V
CC
5.0V
Output Capacitance
9.0
pF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ABT574CMSA | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574CMTC | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574 | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574CSJ | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT646CMSAX | SiGe High-Linearity, 1700MHz to 2200MHz Downconversion Mixer with LO Buffer/Switch |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABT574CSC_Q | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABT574CSCX | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABT574CSJ | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABT574CSJ_Q | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ABT574CSJX | 功能描述:觸發(fā)器 Oct D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。