- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄375058 > 74ABT543CSC (FAIRCHILD SEMICONDUCTOR CORP) Synchronous 4-Bit Binary Counter 16-SSOP 0 to 70 PDF資料下載
參數(shù)資料
| 型號(hào)： | 74ABT543CSC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | Synchronous 4-Bit Binary Counter 16-SSOP 0 to 70 |
| 中文描述： | ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | 0.300 INCH, MS-013, SOIC-24 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大?。?/td> | 78K |
| 代理商： | 74ABT543CSC |
5
www.fairchildsemi.com
7
Extended AC Electrical Characteristics
(SOIC Package)
Note 9:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 10:
This specification is guaranteed but not tested. The limits represent propagation delay with 250pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 11:
This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12:
The 3-STATE delay times are dominated by the RC network (500
, 250 pF) on the output and has been excluded from the datasheet
Skew
(SOIC Package)
Note 13:
This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 14:
This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 15:
Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-
to-LOW (t
OST
). This specification is guaranteed but not tested.
Note 16:
This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 17:
Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested.
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
8 Outputs Switching
(Note 9)
Min
Typ
100
1.5
1.5
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
250 pF
1 Output Switching
(Note 10)
Min
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
250 pF
8 Outputs Switching
(Note 11)
Min
Units
Max
Max
Max
f
TOGGLE
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
Max Toggle Frequency
Propagation Delay
A
n
to B
n
or B
n
to A
n
Propagation Delay
MHz
ns
6.2
6.2
2.0
2.0
7.5
7.5
2.5
2.5
10.0
10.0
1.5
1.5
6.5
6.5
2.0
2.0
8.0
8.0
2.5
2.5
10.5
10.5
ns
LEAB to B
n
, LEBA to A
n
Output Enable Time
OEBA or OEAB to A
n
or B
n
CEBA or CEAB to A
n
or B
n
Output Disable Time
1.5
7.5
2.0
8.5
2.5
11.0
ns
1.5
7.5
2.0
8.5
2.5
11.0
t
PHZ
t
PLZ
OEBA or OEAB to A
n
or B
n
CEBA or CEAB to A
n
or B
n
1.5
8.5
(Note 12)
(Note 12)
ns
1.5
8.5
Symbol
Parameter
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
50 pF
8 Outputs Switching
(Note 13)
Max
1.0
T
A
=
40
°
C to
+
85
°
C
V
CC
=
4.5V–5.5V
C
L
=
250 pF
8 Outputs Switching
(Note 14)
Max
2.0
Units
t
OSHL
(Note 15)
Pin to Pin Skew
HL Transitions
ns
t
OSLH
(Note 15)
t
PS
(Note 16)
t
OST
(Note 15)
Pin to Pin Skew
LH Transitions
Duty Cycle
1.3
2.0
ns
2.0
4.0
ns
LH–HL Skew
Pin to Pin Skew
LH/HL Transitions
2.0
4.0
ns
t
PV
(Note 17)
Device to Device Skew
LH/HL Transitions
2.5
4.5
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ABT574CSC | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574CMSA | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574CMTC | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574 | Octal D-Type Flip-Flop with 3-STATE Outputs |
| 74ABT574CSJ | Octal D-Type Flip-Flop with 3-STATE Outputs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ABT543CSCX | 功能描述:總線收發(fā)器 Oct Registered Trans RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT543D | 制造商:SIGNETICS 功能描述:74ABT543D |
| 74ABT544 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Octal latched transceiver with dual enable; inverting; 3-state |
| 74ABT544D | 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR INV 3-S RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| 74ABT544D,602 | 功能描述:總線收發(fā)器 OCTAL LATCHED XCVR RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。