參數(shù)資料
型號: 74ABT543CMTC
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Synchronous 4-Bit Binary Counter 16-SSOP 0 to 70
中文描述: ABT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
封裝: 4.40 MM, MO-153, TSSOP-24
文件頁數(shù): 2/8頁
文件大?。?/td> 78K
代理商: 74ABT543CMTC
www.fairchildsemi.com
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Functional Description
The ABT543 contains two sets of D-type latches, with sep-
arate input and output controls for each. For data flow from
A to B, for example, the A to B Enable (CEAB) input must
be low in order to enter data from the A Port or take data
from the B Port as indicated in the Data I/O Control Table.
With CEAB low, a low signal on (LEAB) input makes the A
to B latches transparent; a subsequent low to high transi-
tion of the LEAB line puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With CEAB and OEAB both low, the B output buffers are
active and reflect the data present on the output of the A
latches. Control of data flow from B to A is similar, but using
the CEBA, LEBA and OEBA.
Data I/O Control Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Logic Diagram
Inputs
Latch Status
Output Buffers
CEAB
LEAB
OEAB
H
X
X
Latched
HIGH Z
X
H
X
Latched
L
L
X
Transparent
X
X
H
HIGH Z
L
X
L
Driving
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