參數(shù)資料
型號: 7403
廠商: Fairchild Semiconductor Corporation
英文描述: Quad 2-Input NAND Gates with Open-Collector Outputs
中文描述: 四2輸入與非門與集電極開路輸出
文件頁數(shù): 14/28頁
文件大?。?/td> 163K
代理商: 7403
September 1993
14
Philips Semiconductors
Product specification
4-Bit x 64-word FIFO register; 3-state
74HC/HCT7403
Master reset applied with FIFO full
Notes to Fig.8
1.
2.
3.
4.
5.
DIR LOW, output ready HIGH; assume FIFO is full
MR pulse LOW; clears FIFO
DIR goes HIGH; flag indicates input prepared for valid data
DOR goes LOW; flag indicates FIFO empty
Q
n
outputs go LOW (only last bit will be reset).
Fig.8 Waveforms showing the MR input to DIR, DOR and Q
n
output propagation delays and the MR pulse width.
handbook, halfpage
tPHL
VM
3
(1)
t
W
tPLH
DIR OUTPUT
VM
(1)
MR INPUT
VM
(1)
MGA668
Qn OUTPUT
tPHL
4
5
1
2
DOR OUTPUT
(1) HC : V
M
= 50%; V
I
= GND to V
.
HCT: V
M
= 1.3 V; V
I
= GND to 3 V.
相關(guān)PDF資料
PDF描述
74HC7404 5-Bit x 64-word FIFO register; 3-state
74HC7404D 5-Bit x 64-word FIFO register; 3-state
74HC7404N 5-Bit x 64-word FIFO register; 3-state
74HCT7404 Dual 4-Input Positive-NAND Gates 14-TSSOP -40 to 85
74HCT7404D 5-Bit x 64-word FIFO register; 3-state
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