Smart Card VCC Control/Status Register (Vc" />
參數(shù)資料
型號: 73S1210F-68IM/F/P
廠商: Maxim Integrated Products
文件頁數(shù): 109/126頁
文件大?。?/td> 0K
描述: IC SMART CARD READER PROG 68-QFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 260
系列: 73S12xx
核心處理器: 80515
芯體尺寸: 8-位
速度: 24MHz
連通性: I²C,智能卡,UART/USART
外圍設(shè)備: LED,POR,WDT
輸入/輸出數(shù): 8
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 6.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-VFQFN 裸露焊盤
包裝: 管件
DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
83
Smart Card VCC Control/Status Register (VccCtl): 0xFE03 0x00
This register is used to control the power up and power down of the integrated smart card interface. It is
used to determine whether to apply 5V, 3V, or 1.8 to the smart card. Perform the voltage selection with
one write operation, setting both VCCSEL.1 and VCCSEL.0 bits simultaneously. The VDDFLT bit (if
enabled) will provide an emergency deactivation of the internal smart card slot. See the VDD Fault
Detect Function section for more detail.
Table 75: The VccCtl Register
MSB
LSB
VCCSEL.1
VCCSEL.0
VDDFLT
RDYST
VCCOK
SCPWRDN
Bit
Symbol
Function
VccCtl.7
VCCSEL.1
Setting non-zero value for bits 7,6 will begin activation sequence with target
Vcc as given below:
State
VCCSEL.1
VCCSEL.0
VCC
1
0
0V
2
0
1
1.8V
3
1
0
3.0V
4
1
5V
A card event or VCCOK going low will initiate a deactivation sequence.
When the deactivation sequence for RST, CLK and I/O is complete, VCC will
be turned off. When this type of deactivation occurs, the bits must be reset
before initiating another activation.
VccCtl.6
VCCSEL.0
VccCtl.5
VDDFLT
When there is a VDD Fault event, this bit will be set = 0. This causes
VCCSEL.1 and VCCSEL.0 bits to be immediately set = 0 to begin
deactivation.
VccCtl.4
RDYST
If this bit is set = 1, the activation sequence will start when bit VCCOK is set =
1. If not set, the deactivation sequence shall start when the VCCTMR times
out.
VccCtl.3
VCCOK
(Read only). Indicates that VCC output voltage is stable.
VccCtl.2
VccCtl.1
VccCtl.0
SCPWRDN
This bit controls the power-off mode of the 73S1210F circuit.
1 = power off, 0 = normal operation. When in power down mode,
VDD = 0V. VDD can only be turned on by pressing the ON/OFF switch or by
application of 5V to VBUS. If VBUS power is available and SCPWRDN bit is set,
it has no effect until VBUS is removed and VDD will shut off.
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