14
Package Characteristics
All Typicals at T
A
= 25°C.
Parameter
Sym.
Package
Min.
Typ.
Max.
Units
Test Conditions
Fig.
Note
Input-Output
I
I-O
*
Single 8-Pin DIP
1
PA
45% RH, t = 5 s,
20, 21
Insulation
Single SO-8
V
I-O
= 3 kV dc, T
A
= 25°C
Input-Output
V
ISO
8-Pin DIP, SO-8
3750
V rms
RH ≤ 50%, t = 1 min,
20, 21
Momentary With-
Widebody
5000
T
A
= 25°C
20, 22
stand Voltage**
OPT 020
5000
Input-Output
R
I-O
8-Pin DIP, SO-8
1012
:
V
I-O
= 500 V dc
1, 20,
Resistance
Widebody
1012
1013
T
A
= 25°C
23
1011
T
A
= 100°C
Input-Output
C
I-O
8-Pin DIP, SO-8
0.6
pF
f = 1 MHz, T
A
= 25°C
1, 20,
Capacitance
Widebody
0.5
0.6
23
Input-Input
I
I-I
Dual Channel
0.005
PA
RH ≤ 45%, t = 5 s,
24
Insulation
V
I-I
= 500 V
Leakage Current
Resistance
R
I-I
Dual Channel
1011
:
24
(Input-Input)
Capacitance
C
I-I
Dual 8-Pin DIP
0.03
pF
f = 1 MHz
24
(Input-Input)
Dual SO-8
0.25
*JEDEC registered data for the 6N137. The JEDEC Registration species 0°C to 70°C. Avago species -40°C to 85°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous volt-
age rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your equipment
level safety specication or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
For 6N137, HCPL-2601/2611/2630/2631/4661 only.
Notes:
1. Each channel.
2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
4. Derate linearly above 80°C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
5. Bypassing of the power supply line is required, with a 0.1 μF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
6. The JEDEC registration for the 6N137 species a maximum I
OH
of 250 μA. Avago guarantees a maximum I
OH
of 100
PA.
7. The JEDEC registration for the 6N137 species a maximum I
CCH
of 15 mA. Avago guarantees a maximum I
CCH
of 10 mA.
8. The JEDEC registration for the 6N137 species a maximum I
CCL
of 18 mA. Avago guarantees a maximum I
CCL
of 13 mA.
9. The JEDEC registration for the 6N137 species a maximum I
EL
of –2.0 mA. Avago guarantees a maximum I
EL
of -1.6 mA.
10. The t
PLH
propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The t
PHL
propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. t
PSK
is equal to the worst case dierence in t
PHL
and/or t
PLH
that will be seen between units at any given temperature and specied test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The t
ELH
enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The t
EHL
enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CM
H
is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., V
O
> 2.0 V).
17. CM
L
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., V
O
< 0.8 V).
18. For sinusoidal voltages, (|dV
CM
| / dt)
max
=
Sf
CM
V
CM
(p-p).
19. No external pull up is required for a high logic state on the enable input. If the V
E
pin is not used, tying V
E
to V
CC
will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 V rms for one second (leakage detection
current limit, I
I-O
≤ 5
PA).This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-2 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, I
I-O
≤ 5
PA).This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-2 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only