
Advance Information
MC68HC908MR16/MC68HC908MR32
—
Rev. 5.0
228
Timer Interface B (TIMB)
MOTOROLA
Timer Interface B (TIMB)
Addr.
Register Name
Bit 7
TOF
0
0
Bit 15
R
0
Bit 7
R
0
6
5
4
0
3
0
R
0
2
1
Bit 0
$0051
TIMB Status/Control Register
(TBSC)
See page 238.
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read: CH0F
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
Read: CH1F
Write:
Reset:
Read:
Write:
Reset:
Read:
Write:
Reset:
TOIE
TSTOP
PS2
PS1
PS0
TRST
0
Bit 12
R
0
Bit 4
R
0
0
1
0
0
0
$0052
TIMB Counter Register High
(TBCNTH)
See page 240.
Bit 14
R
0
Bit 6
R
0
Bit 13
R
0
Bit 5
R
0
Bit 11
R
0
Bit 3
R
0
Bit 10
R
0
Bit 2
R
0
Bit 9
R
0
Bit 1
R
0
Bit 8
R
0
Bit 0
R
0
$0053
TIMB Counter Register Low
(TBCNTL)
See page 240.
$0054
TIMB Counter Modulo Register
High (TBMODH)
See page 241.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
1
1
1
1
1
1
1
1
$0055
TIMB Counter Modulo Register
Low (TBMODL)
See page 241.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1
1
1
1
1
1
1
1
$0056
TIMB Channel 0 Status/Control
Register
(TBSC0)
See page 242.
CH0IE
MS0B
MS0A
ELS0B
ELS0A
TOV0
CH0MAX
0
0
0
0
0
0
0
0
0
$0057
TIMB Channel 0 Register High
(TBCH0H)
See page 246.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Indetermnate after reset
$0058
TIMB Channel 0 Register Low
(TBCH0L)
See page 246.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Indetermnate after reset
$0059
TIMB Channel 1 Status/Control
Register
(TBSC1)
See page 242.
CH1IE
0
R
0
MS1A
ELS1B
ELS1A
TOV1
CH1MAX
0
0
0
0
0
0
0
0
$005A
TIMB Channel 1 Register High
(TBCH1H)
See page 246.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Indetermnate after reset
$005B
TIMB Channel 1 Register Low
(TBCH1L)
See page 246.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Indetermnate after reset
R
= Reserved
Figure 12-2. TIMB I/O Register Summary