
Operating Modes and On-Chip Memory
EPROM/OTPROM
MC68HC11E Family
—
Rev. 4
Technical Data
MOTOROLA
Operating Modes and On-Chip Memory
95
ODD
—
Program Odd Rows in Half of EEPROM (Test) Bit
Refer to
4.6 EEPROM
.
EVEN
—
Program Even Rows in Half of EEPROM (Test) Bit
Refer to
4.6 EEPROM
.
ELAT
—
EPROM/OTPROM Latch Control Bit
When ELAT = 1, writes to EPROM cause address and data to be
latched and the EPROM/OTPROM cannot be read. ELAT can be
read any time. ELAT can be written any time except when EPGM = 1;
then the write to ELAT is disabled.
0 = EPROM address and data bus configured for normal reads
1 = EPROM address and data bus configured for programming
For the MC68HC711E9:
a.
EPGM enables the high voltage necessary for both EEPROM
and EPROM/OTPROM programming.
b.
ELAT and EELAT are mutually exclusive and cannot both
equal 1.
BYTE
—
Byte/Other EEPROM Erase Mode Bit
Refer to
4.6 EEPROM
.
ROW
—
Row/All EEPROM Erase Mode Bit
Refer to
4.6 EEPROM
.
Address:
$103B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ODD
EVEN
ELAT
(1)
BYTE
ROW
ERASE
EELAT
EPGM
Write:
Reset:
0
0
0
0
0
0
0
0
1. MC68HC711E9 only
Figure 4-14. EPROM and EEPROM Programming
Control Register (PPROG)