參數(shù)資料
型號： 5962R9584506QXC
英文描述： x8 SRAM
中文描述： x8的SRAM
文件頁數(shù)： 33/41頁
文件大小： 290K
代理商： 5962R9584506QXC
SIZE
A
5962-94663
STANDARD
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216-5000
REVISION LEVEL
B
SHEET
33
DSCC FORM 2234
APR 97
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB
in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test
circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
test method 1005 of MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness
assured (see 3.5 herein). RHA levels for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point
electrical parameters shall be as specified in table IIA herein.
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883
method 1019 and as specified herein.
4.4.4.1.1 Accelerated aging test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater
than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the
pre-irradiation end-point electrical parameter limit at 25
°
C
±
5
°
C. Testing shall be performed at initial qualification and after
any design or process changes which may affect the RHA response of the device.
4.4.4.2 Neutron testing. Neutron testing shall be performed in accordance with test method 1017 of MIL-STD-883 and
herein (see 1.4). All device classes must meet the post irradiation end-point electrical parameter limits as defined in table IA,
for the subgroups specified in table IIA herein at T
A
= +25
°
C
±
5
°
C after an exposure of 2 x 10
12
neutron/cm
2
(minimum).
4.4.4.3 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test
method 1020 of MIL-STD-883 and as specified herein (see 1.4). Tests shall be performed on devices, SEC, or approved test
structures at technology qualification and after any design or process changes which may effect the RHA capability of the
process.
4.4.4.4 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with test method 1021 of
MIL-STD-883 and herein (see 1.4).
a.
Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes
which may effect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified.
b.
Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved
radiation hardness assurance plan and MIL-PRF-38535.
4.4.4.5 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.4). SEP testing shall be
performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at
initial qualification and after any design or process changes which may affect the upset or latchup characteristics. The
recommended test conditions for SEP are as follows:
a.
The ion beam angle of incidence shall be between normal to the die surface and 60
°
to the normal, inclusive (i.e. 0
°
≤
angle
≤
60
°
). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b. The fluence shall be
≥
100 errors or
≥
10
6
ions/cm
2
.
c.
The flux shall be between 10
2
and 10
5
ions/cm
2
/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates which differ by at least an order of magnitude.
d. The particle range shall be
≥
20 microns in silicon.
e. The test temperature shall be +25
°
C and the maximum rated operating temperature
±
10
°
C.
f.
Bias conditions shall be defined by the manufacturer for latchup measurements.
相關(guān)PDF資料
PDF描述
5962R9584506QYC 5-Pin, Multiple-Input, Programmable Reset ICs
5962R9584506QZC x8 SRAM
5962R9584506VXC 5-Pin, Multiple-Input, Programmable Reset ICs
5962R9584506VYC x8 SRAM
5962R9584506VZC 5-Pin, Multiple-Input, Programmable Reset ICs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
5962R9660301VXC2732 制造商:Intersil Corporation 功能描述:- Bulk
5962R9662202VXC 制造商:INTER 功能描述: 制造商:INTERC 功能描述:
5962R9665102VXC 制造商:Intersil Corporation 功能描述:
5962R9666302TXC 制造商:Intersil Corporation 功能描述:LINE TRANSMITTER 4TX 16CFPAK - Rail/Tube
5962R9673801VCA 功能描述:校驗器 IC RoHS:否 制造商:STMicroelectronics 產(chǎn)品: 比較器類型: 通道數(shù)量: 輸出類型:Push-Pull 電源電壓-最大:5.5 V 電源電壓-最小:1.1 V 補償電壓（最大值）:6 mV 電源電流（最大值）:1350 nA 響應(yīng)時間: 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SC-70-5 封裝:Reel
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*