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參數(shù)資料
| 型號： | 5962R9581901QQX |
| 廠商： | INTERSIL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 24 I/O, PIA-GENERAL PURPOSE, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 232K |
| 代理商： | 5962R9581901QQX |
12
Operating Modes
Mode 1 (Strobed Input/Output)
This functional conguration provides a means for
transferring I/O data to or from a specied port in conjunction
with strobes or “handshaking” signals. In Mode 1, Port A and
Port B use the lines on Port C to generate or accept these
“handshaking” signals.
Mode 1 Basic Functional Denitions:
Two Groups (Group A and Group B)
Each group contains one 8-bit port and one 4-bit
control/data port.
The 8-bit data port can be either input or output. Both
inputs and outputs are latched.
The 4-bit port is used for control and status of the 8-bit
port.
Input Control Signal Denition
STB (Strobe Input)
A “l(fā)ow” on this input loads data into the input latch.
IBF (Input Buffer Full F/F)
A “high” on this output indicates that the data has been
loaded into the input latch; in essence, an acknowledgment.
IBF is set by STB input being low and is reset by the rising
edge of the RD input.
INTR (Interrupt Request)
A “high” on this output can be used to interrupt the CPU
when an input device is requesting service. INTR is set by
the rising edge of STB and reset by the falling edge of RD.
This procedure allows an input device to request service
from the CPU by simply strobing its data into the port.
INTE A
Controlled by Bit Set/Reset of PC4.
INTE B
Controlled by Bit Set/Reset of PC2.
CONTROL WORD #12
CONTROL WORD #13
CONTROL WORD #14
CONTROL WORD #15
Mode 0 Congurations (Continued)
D7 D6 D5 D4 D3 D2 D1 D0
1001100
0
A
C
B
8
4
8
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
D7 - D0
D7 D6 D5 D4 D3 D2 D1 D0
1001100
1
A
C
B
8
4
8
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
D7 - D0
D7 D6 D5 D4 D3 D2 D1 D0
1001101
0
A
C
B
8
4
8
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
D7 - D0
D7 D6 D5 D4 D3 D2 D1 D0
1001101
1
A
C
B
8
4
8
PA7 - PA0
PC7 - PC4
PC3 - PC0
PB7 - PB0
D7 - D0
INTE
A
PC6, 7
1 = INPUT
0 = OUTPUT
D7 D6 D5 D4 D3 D2 D1 D0
1
CONTROL WORD
MODE 1 (PORT B)
11
PA7 - PA0
PC4
PC5
PC3
PC6, 7
RD
8
STB
IBF
INTR
I/O
2
INTE
B
PB7 - PB0
PC2
PC1
PC0
RD
8
STB
IBF
INTR
B
A
D7 D6 D5 D4 D3 D2 D1 D0
1011 1/0
CONTROL WORD
MODE 1 (PORT A)
FIGURE 15. MODE 1 INPUT
HS-82C55ARH
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